Message ID | 20240123224842.18485-1-philmd@linaro.org |
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Tue, 23 Jan 2024 14:48:44 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <philmd@linaro.org> To: qemu-devel@nongnu.org Cc: Peter Maydell <peter.maydell@linaro.org>, qemu-arm@nongnu.org, Joel Stanley <joel@jms.id.au>, Andrew Jeffery <andrew@codeconstruct.com.au>, =?utf-8?q?C=C3=A9dric_Le_Goater?= <clg@kaod.org>, =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= <philmd@linaro.org> Subject: [PATCH v2 0/5] hw/arm/aspeed: Check for CPU types in machine_run_board_init() Date: Tue, 23 Jan 2024 23:48:37 +0100 Message-ID: <20240123224842.18485-1-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <https://lists.nongnu.org/archive/html/qemu-devel> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org |
Series |
hw/arm/aspeed: Check for CPU types in machine_run_board_init()
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+Gavin On 23/1/24 23:48, Philippe Mathieu-Daudé wrote: > Since v1: > - Follow suggestions from Cédric from [*] > > [*] https://lore.kernel.org/qemu-devel/e13c655b-7904-4e47-a673-4efd13c26b3d@kaod.org/ > > Based-on: <20240123222508.13826-1-philmd@linaro.org> > > Philippe Mathieu-Daudé (5): > hw/arm/aspeed: Remove dead code > hw/arm/aspeed: Set default CPU count using aspeed_soc_num_cpus() > hw/arm/aspeed: Init CPU defaults in a common helper > hw/arm/aspeed: Introduce aspeed_soc_cpu_type() helper > hw/arm/aspeed: Check for CPU types in machine_run_board_init() > > include/hw/arm/aspeed_soc.h | 4 ++- > hw/arm/aspeed.c | 70 +++++++++++++++---------------------- > hw/arm/aspeed_ast10x0.c | 8 +++-- > hw/arm/aspeed_ast2400.c | 15 ++++++-- > hw/arm/aspeed_ast2600.c | 9 +++-- > hw/arm/aspeed_soc_common.c | 8 +++++ > 6 files changed, 65 insertions(+), 49 deletions(-) >