| Message ID | 20231229202959.266502-1-david@ixit.cz |
|---|---|
| State | New |
| Headers | show |
| Series | arm64: dts: qcom: sdm845: add power domain to UFS phy interface | expand |
On Freitag, 29. Dezember 2023 21:29:54 CET David Heidelberg wrote: > Reported by: `make CHECK_DTBS=1 qcom/sdm845-oneplus-enchilada.dtb` > > Signed-off-by: David Heidelberg <david@ixit.cz> > --- > arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi > b/arch/arm64/boot/dts/qcom/sdm845.dtsi index c2244824355a..ad8677b62bfb > 100644 > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi > @@ -2644,6 +2644,8 @@ ufs_mem_phy: phy@1d87000 { > clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, > <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; > > + power-domains = <&gcc UFS_PHY_GDSC>; > + > resets = <&ufs_mem_hc 0>; > reset-names = "ufsphy"; This is potentially the wrong power domain, see the conversation here: https://lore.kernel.org/linux-arm-msm/20231204172829.GA69580@thinkpad/ Hopefully Mani can give some input here :) Regards Luca
On 29/12/2023 22:37, Luca Weiss wrote: > On Freitag, 29. Dezember 2023 21:29:54 CET David Heidelberg wrote: >> Reported by: `make CHECK_DTBS=1 qcom/sdm845-oneplus-enchilada.dtb` >> >> Signed-off-by: David Heidelberg <david@ixit.cz> >> --- >> arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 ++ >> 1 file changed, 2 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi >> b/arch/arm64/boot/dts/qcom/sdm845.dtsi index c2244824355a..ad8677b62bfb >> 100644 >> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi >> @@ -2644,6 +2644,8 @@ ufs_mem_phy: phy@1d87000 { >> clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, >> <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; >> >> + power-domains = <&gcc UFS_PHY_GDSC>; >> + >> resets = <&ufs_mem_hc 0>; >> reset-names = "ufsphy"; > This is potentially the wrong power domain, see the conversation here: > https://lore.kernel.org/linux-arm-msm/20231204172829.GA69580@thinkpad/ Thanks, I was thinking about SDM845_MX, but then looked at rest more closer qcom archs and thought it'll be likely GDSC (also by looking at ufs_mem_hc reset vectors). > > Hopefully Mani can give some input here :) > > Regards > Luca > >
Hi David, Did you boot-test this? On 30/12/2023 00:18, David Heidelberg wrote: > On 29/12/2023 22:37, Luca Weiss wrote: > >> On Freitag, 29. Dezember 2023 21:29:54 CET David Heidelberg wrote: >>> Reported by: `make CHECK_DTBS=1 qcom/sdm845-oneplus-enchilada.dtb` >>> >>> Signed-off-by: David Heidelberg <david@ixit.cz> >>> --- >>> arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 ++ >>> 1 file changed, 2 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi >>> b/arch/arm64/boot/dts/qcom/sdm845.dtsi index c2244824355a..ad8677b62bfb >>> 100644 >>> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi >>> @@ -2644,6 +2644,8 @@ ufs_mem_phy: phy@1d87000 { >>> clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, >>> <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; >>> >>> + power-domains = <&gcc UFS_PHY_GDSC>; >>> + >>> resets = <&ufs_mem_hc 0>; >>> reset-names = "ufsphy"; >> This is potentially the wrong power domain, see the conversation here: >> https://lore.kernel.org/linux-arm-msm/20231204172829.GA69580@thinkpad/ > Thanks, I was thinking about SDM845_MX, but then looked at rest more > closer qcom archs and thought it'll be likely GDSC (also by looking at > ufs_mem_hc reset vectors). >> >> Hopefully Mani can give some input here :) >> >> Regards >> Luca >> >>
On Fri, Dec 29, 2023 at 10:37:56PM +0100, Luca Weiss wrote: > On Freitag, 29. Dezember 2023 21:29:54 CET David Heidelberg wrote: > > Reported by: `make CHECK_DTBS=1 qcom/sdm845-oneplus-enchilada.dtb` > > > > Signed-off-by: David Heidelberg <david@ixit.cz> > > --- > > arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi > > b/arch/arm64/boot/dts/qcom/sdm845.dtsi index c2244824355a..ad8677b62bfb > > 100644 > > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi > > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi > > @@ -2644,6 +2644,8 @@ ufs_mem_phy: phy@1d87000 { > > clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, > > <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; > > > > + power-domains = <&gcc UFS_PHY_GDSC>; > > + > > resets = <&ufs_mem_hc 0>; > > reset-names = "ufsphy"; > > This is potentially the wrong power domain, see the conversation here: > https://lore.kernel.org/linux-arm-msm/20231204172829.GA69580@thinkpad/ > Yes, GDSCs are the power domain of the controllers, not PHYs. This applies to other peripherals such as USB, PCIe etc... - Mani > Hopefully Mani can give some input here :) > > Regards > Luca > >
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index c2244824355a..ad8677b62bfb 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2644,6 +2644,8 @@ ufs_mem_phy: phy@1d87000 { clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; + power-domains = <&gcc UFS_PHY_GDSC>; + resets = <&ufs_mem_hc 0>; reset-names = "ufsphy";
Reported by: `make CHECK_DTBS=1 qcom/sdm845-oneplus-enchilada.dtb` Signed-off-by: David Heidelberg <david@ixit.cz> --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 ++ 1 file changed, 2 insertions(+)