| Message ID | 20231208210458.912776-1-CFSworks@gmail.com |
|---|---|
| Headers | show |
| Series | Allow disabling USB3 ports in xHCI/DWC3 | expand |
On 08/12/2023 22:04, Sam Edwards wrote: > Some systems may have xHCI controllers that enumerate USB 3.0 ports, but > these ports nevertheless cannot be used. Perhaps enabling them triggers a > hardware bug, or perhaps they simply aren't connected and it would be > confusing to the user to see an unusable USB 3.0 rhub show up -- whatever > the case may be, it's reasonable to want to disable these ports. > > Add a DT property (and associated quirk) to the xHCI driver that skips > over (i.e. ignores and doesn't initialize) any USB 3.0 ports discovered > during driver initialization. > > Signed-off-by: Sam Edwards <CFSworks@gmail.com> > --- > Documentation/devicetree/bindings/usb/usb-xhci.yaml | 4 ++++ Bindings are always separate patches. Please do not sneak in properties without DT review. Please use scripts/get_maintainers.pl to get a list of necessary people and lists to CC. It might happen, that command when run on an older kernel, gives you outdated entries. Therefore please be sure you base your patches on recent Linux kernel. You missed at least devicetree list (maybe more), so this won't be tested by automated tooling. Performing review on untested code might be a waste of time, thus I will skip this patch entirely till you follow the process allowing the patch to be tested. Please kindly resend and include all necessary To/Cc entries. Best regards, Krzysztof
On 12/9/23 06:53, Krzysztof Kozlowski wrote: > On 08/12/2023 22:04, Sam Edwards wrote: >> Some systems may have xHCI controllers that enumerate USB 3.0 ports, but >> these ports nevertheless cannot be used. Perhaps enabling them triggers a >> hardware bug, or perhaps they simply aren't connected and it would be >> confusing to the user to see an unusable USB 3.0 rhub show up -- whatever >> the case may be, it's reasonable to want to disable these ports. >> >> Add a DT property (and associated quirk) to the xHCI driver that skips >> over (i.e. ignores and doesn't initialize) any USB 3.0 ports discovered >> during driver initialization. >> >> Signed-off-by: Sam Edwards <CFSworks@gmail.com> >> --- >> Documentation/devicetree/bindings/usb/usb-xhci.yaml | 4 ++++ Hi Krzysztof, > > Bindings are always separate patches. > > Please do not sneak in properties without DT review. > It makes sense that the new property should be introduced in a separate patch. I'll ensure that is the case in v2. (If there is one -- see below.) > Please use scripts/get_maintainers.pl to get a list of necessary people > and lists to CC. It might happen, that command when run on an older > kernel, gives you outdated entries. Therefore please be sure you base > your patches on recent Linux kernel. > > You missed at least devicetree list (maybe more), so this won't be > tested by automated tooling. I have tried (and failed) to find the documentation for this linux-devicetree bot. Do you have the link? In particular, I'd like to ensure that patch 2/2 (the one that actually changes established behavior) is tested sufficiently thoroughly. > Performing review on untested code might be > a waste of time, thus I will skip this patch entirely till you follow > the process allowing the patch to be tested. That's fine; this patch has just failed review anyway (due to the new property not being introduced in a separate patch), and I'll need to prepare and send a v2 to proceed. However as I mentioned in the cover, this is a semi-RFC. I haven't discussed the overall idea with anyone yet, so to avoid wasting my own time, I need to give the USB folks ample opportunity to object to the proposed changes or suggest improvements before investing more effort in refining the patchset. As of now, I'm only seeking commentary, not formal review. I'd appreciate any insights on the approach I've taken and whether there are any potential challenges or alternatives that haven't been explored yet. Therefore, I'll hold off on CC-ing linux-devicetree at this stage to keep the focus on the broader concept, and will loop them in (with any other recipients as appropriate) for v2 when (and if!) there's consensus here on linux-usb that the general direction is worth pursuing. > > Please kindly resend and include all necessary To/Cc entries. > > Best regards, > Krzysztof > Happy Saturday, Sam
On 09/12/2023 20:26, Sam Edwards wrote: >> Performing review on untested code might be >> a waste of time, thus I will skip this patch entirely till you follow >> the process allowing the patch to be tested. > > That's fine; this patch has just failed review anyway (due to the new > property not being introduced in a separate patch), and I'll need to > prepare and send a v2 to proceed. However as I mentioned in the cover, > this is a semi-RFC. I haven't discussed the overall idea with anyone > yet, so to avoid wasting my own time, I need to give the USB folks ample It does not really explain why you did not Cc some of the maintainers. If this is a RFC, even though not marked as such in subject prefix, then I guess all maintainers should be involved for comments. Best regards, Krzysztof
On 12/10/23 04:10, Krzysztof Kozlowski wrote: > It does not really explain why you did not Cc some of the maintainers. > If this is a RFC, even though not marked as such in subject prefix, then > I guess all maintainers should be involved for comments. Hi Krzysztof, More simply put: I don't want to waste anyone's time by seeking review/commentary from linux-devicetree on a property enabling a feature that someone here on linux-usb might soon deem (summarily) untenable. I agree fully that I need (and want) the DT reviewers' sign-off on this new property, and I'll get more serious about that (and other things) in v2. I just need to know if there's going to be a v2 first. Warm regards, Sam
On 8.12.2023 23.04, Sam Edwards wrote: > Hi USB devs, > > This patchset is a semi-RFC: I haven't discussed this change yet, and it may > turn out to be a bad idea. But if there is a consensus that this change is > appropriate, these patches are the ones I'd submit for inclusion. > > These patches were developed while working with a SoC (Rockchip RK3588) that > contains DWC3-OTG controllers and accompanying USB2 + USB3/DP PHYs. My target > (Turing RK1) uses its first bus in USB2.0-OTG mode only: the associated USB3 > PHY is reserved for DP. Worse, a driver for the USBDP block (though it exists) > has not been merged to mainline. Without lighting up the PHY side of the PIPE, > the DWC3 behaves erratically, even for USB2 operation. > > This could be addressed by patching in the (out-of-tree) USBDP driver and > enabling only its USB backend. However, I found it cleaner (also from a > user-friendliness standpoint) just to disable the unusable USB3 port. These > patches achieve that by (1) making it possible to tell the xHCI driver to > ignore any USB3 port(s), and (2) (perhaps more controversially) making the DWC3 > driver disable USB3 host ports when `maximum-speed` isn't set high enough. I don't think this will work as a generic xhci driver feature. Even if we ignore all USB3 ports in software they will for most xHC hosts be powered and enabled in hardware by default after controller reset. This means they perform link training, generate all kinds of events with interrupts (connect, over-current etc) that driver now can't handle. Sound like the setup you are using has a very specific issue, and it would need a narrow targeted quirk to solve it. > > There are other ways to disable the USB3 ports on RK3588, such as via some > syscon registers. I figured I would start with the most general solution > (benefitting other SoCs) first, getting more specific only if necessary. :) To me a specific solution to a specific problem like this sounds better. Thanks Mathias
Hi Mathias, On 12/14/23 04:05, Mathias Nyman wrote: > I don't think this will work as a generic xhci driver feature. > > Even if we ignore all USB3 ports in software they will for most xHC > hosts be powered > and enabled in hardware by default after controller reset. > > This means they perform link training, generate all kinds of events with > interrupts > (connect, over-current etc) that driver now can't handle. By this do you mean that having the xHCI driver ignore the USB3 ports isn't enough to ensure that PP=0 (and the driver would need to do a little bit more to make sure that the "parking brake" is on: e.g. initialize, but not use, the ports) or that the xHC's PP=0 signal isn't sufficient to keep the PHYs from trying to bring the link up and generating those interrupts (PP=0 really isn't enough, and there is no general "parking brake" to be found here)? > Sound like the setup you are using has a very specific issue, and it > would need > a narrow targeted quirk to solve it. I infer from this that you're against having a DT property added to xHCI? What if the property were to be narrowed in scope to "ignore the USB3 PHYs, they're disabled/absent" vs. this iteration's "disable the USB3 ports" meaning? If this quirk ends up landing in the dwc3 driver (since, arguably, DWC3 is the real misbehaving hw block in these circumstances), what would be your preferred mechanism of signaling to the xHCI layer "the USB3 PHYs have been disabled; please ignore"? > >> >> There are other ways to disable the USB3 ports on RK3588, such as via >> some >> syscon registers. I figured I would start with the most general solution >> (benefitting other SoCs) first, getting more specific only if >> necessary. :) > > To me a specific solution to a specific problem like this sounds better. I am starting to think so as well. I may shift my focus to DWC3 (with xHCI driver changes made only to facilitate them) for now, since `maximum-speed = "high-speed";` very reasonably (imo) should prevent registering the usb3 rhub -- though something may convince me otherwise in the near future. :) > Thanks > Mathias Thanks to you as well, this is exactly the type of feedback I was fishing for! Cheers, Sam
On 15.12.2023 23.59, Sam Edwards wrote: > Hi Mathias, > > On 12/14/23 04:05, Mathias Nyman wrote: >> I don't think this will work as a generic xhci driver feature. >> >> Even if we ignore all USB3 ports in software they will for most xHC hosts be powered >> and enabled in hardware by default after controller reset. >> >> This means they perform link training, generate all kinds of events with interrupts >> (connect, over-current etc) that driver now can't handle. > > By this do you mean that having the xHCI driver ignore the USB3 ports isn't enough to ensure that PP=0 (and the driver would need to do a little bit more to make sure that the "parking brake" is on: e.g. initialize, but not use, the ports) or that the xHC's PP=0 signal isn't sufficient to keep the PHYs from trying to bring the link up and generating those interrupts (PP=0 really isn't enough, and there is no general "parking brake" to be found here)? > Yes, in most cases PP==1 after xHC reset, here's some old debug output during boot: [ 2.571057] xhci_hcd 0000:00:0d.0: new USB bus registered, assigned bus number 2 [ 2.571061] xhci_hcd 0000:00:0d.0: Host supports USB 3.2 Enhanced SuperSpeed [ 2.571065] xhci_hcd 0000:00:0d.0: // Turn on HC, cmd = 0x5. [ 2.571067] xhci_hcd 0000:00:0d.0: Finished xhci_run for USB3 roothub [ 2.571093] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 5.15 [ 2.571095] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [ 2.571097] usb usb2: Product: xHCI Host Controller [ 2.571098] usb usb2: Manufacturer: Linux 5.15.57-06982-gf7339f7585d8-dirty xhci-hcd [ 2.571099] usb usb2: SerialNumber: 0000:00:0d.0 [ 2.571197] xHCI xhci_add_endpoint called for root hub [ 2.571199] xHCI xhci_check_bandwidth called for root hub [ 2.571224] hub 2-0:1.0: USB hub found [ 2.571230] hub 2-0:1.0: 2 ports detected [ 2.571279] xhci_hcd 0000:00:0d.0: set port power 2-1 ON, portsc: 0x2a0 Note that portsc: 0x2a0 entry above has PP=1, and it shows the portsc register value _before_ port power is set to 1 (ON). Port Status: 0x2a0 Disconnected Disabled Link: Rx Detect Powered Unknown port speed Forcing PP=0 could possibly prevent any events from those ports. >> Sound like the setup you are using has a very specific issue, and it would need >> a narrow targeted quirk to solve it. > > I infer from this that you're against having a DT property added to xHCI? What if the property were to be narrowed in scope to "ignore the USB3 PHYs, they're disabled/absent" vs. this iteration's "disable the USB3 ports" meaning? > > If this quirk ends up landing in the dwc3 driver (since, arguably, DWC3 is the real misbehaving hw block in these circumstances), what would be your preferred mechanism of signaling to the xHCI layer "the USB3 PHYs have been disabled; please ignore"? I don't have a good solution in mind for this so I'll just throw some ideas: What happends if you in some RK3588 platform code disable USB ports via those syscon registers, but let the xhci driver be, and USB3 roothub enumerates normally? Or if this is about a misbehaving USB3 PHY, how about adding the USB3 PHY driver that describes reality and fails when usb_phy_roothub_init() or usb_phy_roothub_set_mode() are called by for USB3 hcd during usb_add_hcd(USB3). xhci driver could then continue without the USB3 hcd. turning off USB3 ports. Adding the 'maximum-speed = "high-speed"' entry could also be one option. Thanks Mathias
Hi USB devs, This patchset is a semi-RFC: I haven't discussed this change yet, and it may turn out to be a bad idea. But if there is a consensus that this change is appropriate, these patches are the ones I'd submit for inclusion. These patches were developed while working with a SoC (Rockchip RK3588) that contains DWC3-OTG controllers and accompanying USB2 + USB3/DP PHYs. My target (Turing RK1) uses its first bus in USB2.0-OTG mode only: the associated USB3 PHY is reserved for DP. Worse, a driver for the USBDP block (though it exists) has not been merged to mainline. Without lighting up the PHY side of the PIPE, the DWC3 behaves erratically, even for USB2 operation. This could be addressed by patching in the (out-of-tree) USBDP driver and enabling only its USB backend. However, I found it cleaner (also from a user-friendliness standpoint) just to disable the unusable USB3 port. These patches achieve that by (1) making it possible to tell the xHCI driver to ignore any USB3 port(s), and (2) (perhaps more controversially) making the DWC3 driver disable USB3 host ports when `maximum-speed` isn't set high enough. There are other ways to disable the USB3 ports on RK3588, such as via some syscon registers. I figured I would start with the most general solution (benefitting other SoCs) first, getting more specific only if necessary. :) Thank you for your attention, Sam Sam Edwards (2): xhci: Introduce "disable-usb3" DT property/quirk usb: dwc3: host: Disable USB3 ports if maximum-speed doesn't permit USB3 Documentation/devicetree/bindings/usb/usb-xhci.yaml | 4 ++++ drivers/usb/dwc3/host.c | 5 ++++- drivers/usb/host/xhci-mem.c | 4 ++++ drivers/usb/host/xhci-plat.c | 3 +++ drivers/usb/host/xhci.h | 1 + 5 files changed, 16 insertions(+), 1 deletion(-)