| Message ID | 20231212133247.1366698-3-quic_omprsing@quicinc.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add QCrypto support for SC7280 | expand |
On 12/12/2023 14:32, Om Prakash Singh wrote: > Add the QCE and Crypto BAM DMA nodes. > > Signed-off-by: Om Prakash Singh <quic_omprsing@quicinc.com> > --- > > Changes in V2: > - Update DT node sequence as per register ascending order Hm, I don't see it... > - Fix DT node properties as per convention > > arch/arm64/boot/dts/qcom/sc7280.dtsi | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi > index 66f1eb83cca7..7b705df21f4e 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > @@ -2272,6 +2272,28 @@ ipa: ipa@1e40000 { > status = "disabled"; > }; > > + cryptobam: dma-controller@1dc4000 { It still looks like not correctly ordered by unit address against other nodes in the file. Best regards, Krzysztof
On 12/14/2023 12:52 PM, Krzysztof Kozlowski wrote: > On 14/12/2023 06:41, Om Prakash Singh wrote: >> >> >> On 12/12/2023 8:32 PM, Krzysztof Kozlowski wrote: >>> On 12/12/2023 14:32, Om Prakash Singh wrote: >>>> Add the QCE and Crypto BAM DMA nodes. >>>> >>>> Signed-off-by: Om Prakash Singh <quic_omprsing@quicinc.com> >>>> --- >>>> >>>> Changes in V2: >>>> - Update DT node sequence as per register ascending order >>> >>> Hm, I don't see it... >>> >>>> - Fix DT node properties as per convention >>>> >>>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 22 ++++++++++++++++++++++ >>>> 1 file changed, 22 insertions(+) >>>> >>>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi >>>> index 66f1eb83cca7..7b705df21f4e 100644 >>>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi >>>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi >>>> @@ -2272,6 +2272,28 @@ ipa: ipa@1e40000 { >>>> status = "disabled"; >>>> }; >>>> >>>> + cryptobam: dma-controller@1dc4000 { >>> >>> It still looks like not correctly ordered by unit address against other >>> nodes in the file. >>> >> >> Hi Krzysztof, >> Probably I am missing something basic here. I am trying to put entries >> addresses that are sorted wrt their current adjacent. >> >> And it looks fine to me. >> >> 1c0e000 (current exist) >> 1dc4000 (newly added) >> 1dfa000 (newly added) >> 1e40000 (current exist) > > Then why the diff shows: > @@ -2272,6 +2272,28 @@ ipa: ipa@1e40000 { > above your changes? my mistake! Local change was not added in updated patch. Submitting V3 > > Best regards, > Krzysztof >
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 66f1eb83cca7..7b705df21f4e 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2272,6 +2272,28 @@ ipa: ipa@1e40000 { status = "disabled"; }; + cryptobam: dma-controller@1dc4000 { + compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0"; + reg = <0x0 0x01dc4000 0x0 0x28000>; + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; + #dma-cells = <1>; + qcom,ee = <0>; + qcom,controlled-remotely; + iommus = <&apps_smmu 0x4e4 0x0011>, + <&apps_smmu 0x4e6 0x0011>; + }; + + crypto: crypto@1dfa000 { + compatible = "qcom,sc7280-qce", "qcom,sm8150-qce", "qcom,qce"; + reg = <0x0 0x01dfa000 0x0 0x6000>; + dmas = <&cryptobam 4>, <&cryptobam 5>; + dma-names = "rx", "tx"; + iommus = <&apps_smmu 0x4e4 0x0011>, + <&apps_smmu 0x4e4 0x0011>; + interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>; + interconnect-names = "memory"; + }; + tcsr_mutex: hwlock@1f40000 { compatible = "qcom,tcsr-mutex"; reg = <0 0x01f40000 0 0x20000>;
Add the QCE and Crypto BAM DMA nodes. Signed-off-by: Om Prakash Singh <quic_omprsing@quicinc.com> --- Changes in V2: - Update DT node sequence as per register ascending order - Fix DT node properties as per convention arch/arm64/boot/dts/qcom/sc7280.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)