Message ID | 20231207070700.4156557-11-claudiu.beznea.uj@bp.renesas.com |
---|---|
State | New |
Headers | show |
Series | renesas: rzg3s: Add support for Ethernet | expand |
On Thu, Dec 7, 2023 at 8:08 AM Claudiu <claudiu.beznea@tuxon.dev> wrote: > From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > > The intention of the SW_SD0_DEV_SEL and SW_SD2_EN macros was to reflect the > state of SW_CONFIG individual switches available on the RZ/G3S Smarc Module > and at the same time to have a descriptive name for the switch itself. > Each individual switch is associated with a signal name, which might be > active-low or not on the board. Using signal names instead of SW_CONFIG > switch names may be confusing for a user who just playes with switches to > select individual functionalities, but also for the advanced user that > looks over schematics. To avoid even further confusions, use the switches' > names here and instantitate them with an ON/OFF state. This should be > simpler, even though the name of the switch is not that intuitive. The > switch names documentation reflects the switch's purpose. > > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > --- > > Changes in v2: > - this patch is new and aims to replace patch "arm64: renesas: rzg3s-smarc-som: > Invert the logic of the SW_SD2_EN macro" from v1 Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v6.8. Gr{oetje,eeting}s, Geert
diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi index 01a4a9da7afc..f59094701a4a 100644 --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi @@ -9,23 +9,31 @@ #include <dt-bindings/pinctrl/rzg2l-pinctrl.h> /* - * Signals of SW_CONFIG switches: - * @SW_SD0_DEV_SEL: - * 0 - SD0 is connected to eMMC - * 1 - SD0 is connected to uSD0 card - * @SW_SD2_EN: - * 0 - SCIF1, SSI0, IRQ0, IRQ1 connected to SoC - * 1 - SD2 is connected to SoC + * On-board switches' states: + * @SW_OFF: switch's state is OFF + * @SW_ON: switch's state is ON */ -#define SW_SD0_DEV_SEL 1 -#define SW_SD2_EN 1 +#define SW_OFF 0 +#define SW_ON 1 + +/* + * SW_CONFIG[x] switches' states: + * @SW_CONFIG2: + * SW_OFF - SD0 is connected to eMMC + * SW_ON - SD0 is connected to uSD0 card + * @SW_CONFIG3: + * SW_OFF - SD2 is connected to SoC + * SW_ON - SCIF1, SSI0, IRQ0, IRQ1 connected to SoC + */ +#define SW_CONFIG2 SW_ON +#define SW_CONFIG3 SW_OFF / { compatible = "renesas,rzg3s-smarcm", "renesas,r9a08g045s33", "renesas,r9a08g045"; aliases { mmc0 = &sdhi0; -#if SW_SD2_EN +#if SW_CONFIG3 == SW_OFF mmc2 = &sdhi2; #endif }; @@ -50,7 +58,7 @@ vcc_sdhi0: regulator0 { enable-active-high; }; -#if SW_SD0_DEV_SEL +#if SW_CONFIG2 == SW_ON vccq_sdhi0: regulator1 { compatible = "regulator-gpio"; regulator-name = "SDHI0 VccQ"; @@ -85,7 +93,7 @@ &extal_clk { clock-frequency = <24000000>; }; -#if SW_SD0_DEV_SEL +#if SW_CONFIG2 == SW_ON /* SD0 slot */ &sdhi0 { pinctrl-0 = <&sdhi0_pins>; @@ -116,7 +124,7 @@ &sdhi0 { }; #endif -#if SW_SD2_EN +#if SW_CONFIG3 == SW_OFF &sdhi2 { pinctrl-0 = <&sdhi2_pins>; pinctrl-names = "default";