| Message ID | 20231107080436.16747-1-krzysztof.kozlowski@linaro.org |
|---|---|
| State | Accepted |
| Commit | f0f99f371822c48847e02e56d6e7de507e18f186 |
| Headers | show |
| Series | dt-bindings: cache: qcom,llcc: correct QDU1000 reg entries | expand |
On 11/8/2023 5:56 PM, Conor Dooley wrote: > On Tue, Nov 07, 2023 at 02:25:25PM +0530, Mukesh Ojha wrote: >> >> >> On 11/7/2023 1:34 PM, Krzysztof Kozlowski wrote: >>> Qualcomm QDU1000 DTSI comes with one LLCC0 base address as pointed by >>> dtbs_check: >>> >>> qdu1000-idp.dtb: system-cache-controller@19200000: reg-names:2: 'llcc2_base' was expected >>> >>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> >>> >>> --- >>> >>> Recent LLCC patches were not tested on QDU1000 thus the LLCC is there >>> broken. This patch at least tries to bring some sense according to >>> DTSI, but I have no clue what is here correct: driver, DTS or bindings. >>> --- >>> Documentation/devicetree/bindings/cache/qcom,llcc.yaml | 2 +- >>> 1 file changed, 1 insertion(+), 1 deletion(-) >>> >>> diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml >>> index 580f9a97ddf7..d610b0be262c 100644 >>> --- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml >>> +++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml >>> @@ -64,6 +64,7 @@ allOf: >>> compatible: >>> contains: >>> enum: >>> + - qcom,qdu1000-llcc >>> - qcom,sc7180-llcc >>> - qcom,sm6350-llcc >> >> Thanks, again. >> >> Acked-by: Mukesh Ojha <quic_mojha@quicinc.com> > > I'm assuming given your employer, this ack means that there is no > llcc2_base on the qdu1000. Yes, not even have llcc1 , just llcc0. -Mukesh > > Acked-by: Conor Dooley <conor.dooley@microchip.com> > > Cheers, > Conor.
On Tue, 07 Nov 2023 09:04:36 +0100, Krzysztof Kozlowski wrote: > Qualcomm QDU1000 DTSI comes with one LLCC0 base address as pointed by > dtbs_check: > > qdu1000-idp.dtb: system-cache-controller@19200000: reg-names:2: 'llcc2_base' was expected > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > --- > > Recent LLCC patches were not tested on QDU1000 thus the LLCC is there > broken. This patch at least tries to bring some sense according to > DTSI, but I have no clue what is here correct: driver, DTS or bindings. > --- > Documentation/devicetree/bindings/cache/qcom,llcc.yaml | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Applied, thanks!
diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml index 580f9a97ddf7..d610b0be262c 100644 --- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml @@ -64,6 +64,7 @@ allOf: compatible: contains: enum: + - qcom,qdu1000-llcc - qcom,sc7180-llcc - qcom,sm6350-llcc then: @@ -101,7 +102,6 @@ allOf: compatible: contains: enum: - - qcom,qdu1000-llcc - qcom,sc8180x-llcc - qcom,sc8280xp-llcc then:
Qualcomm QDU1000 DTSI comes with one LLCC0 base address as pointed by dtbs_check: qdu1000-idp.dtb: system-cache-controller@19200000: reg-names:2: 'llcc2_base' was expected Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- Recent LLCC patches were not tested on QDU1000 thus the LLCC is there broken. This patch at least tries to bring some sense according to DTSI, but I have no clue what is here correct: driver, DTS or bindings. --- Documentation/devicetree/bindings/cache/qcom,llcc.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)