| Message ID | 20231122183048.17150-5-philmd@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | hw/arm: Step toward building qemu-system-{arm, aarch64} altogether | expand |
On 11/22/23 12:30, Philippe Mathieu-Daudé wrote: > The ARM_CPU_IRQ/FIQ definitions are meant for the ARM CPU > QOM model. Move them to "cpu-qom.h" so any QOM code can > use them. > > Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org> > --- > Or do these definitions belong to cpu-defs.h? I think they belong with the qom bits. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/target/arm/cpu-qom.h b/target/arm/cpu-qom.h index be307037ff..38030450f7 100644 --- a/target/arm/cpu-qom.h +++ b/target/arm/cpu-qom.h @@ -36,6 +36,12 @@ DECLARE_CLASS_CHECKERS(AArch64CPUClass, AARCH64_CPU, #define ARM_CPU_TYPE_SUFFIX "-" TYPE_ARM_CPU #define ARM_CPU_TYPE_NAME(name) (name ARM_CPU_TYPE_SUFFIX) +/* Meanings of the ARMCPU object's four inbound GPIO lines */ +#define ARM_CPU_IRQ 0 +#define ARM_CPU_FIQ 1 +#define ARM_CPU_VIRQ 2 +#define ARM_CPU_VFIQ 3 + bool target_aarch64_available(void); #endif diff --git a/target/arm/cpu.h b/target/arm/cpu.h index d369275827..124d829742 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -107,12 +107,6 @@ enum { #define offsetofhigh32(S, M) (offsetof(S, M) + sizeof(uint32_t)) #endif -/* Meanings of the ARMCPU object's four inbound GPIO lines */ -#define ARM_CPU_IRQ 0 -#define ARM_CPU_FIQ 1 -#define ARM_CPU_VIRQ 2 -#define ARM_CPU_VFIQ 3 - /* ARM-specific extra insn start words: * 1: Conditional execution bits * 2: Partial exception syndrome for data aborts
The ARM_CPU_IRQ/FIQ definitions are meant for the ARM CPU QOM model. Move them to "cpu-qom.h" so any QOM code can use them. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- Or do these definitions belong to cpu-defs.h? --- target/arm/cpu-qom.h | 6 ++++++ target/arm/cpu.h | 6 ------ 2 files changed, 6 insertions(+), 6 deletions(-)