diff mbox series

ARM: dts: stm32: add STM32F746 syscfg clock

Message ID 20231101155153.2767482-2-ben.wolsieffer@hefring.com
State Accepted
Commit 86f15a5a6c13e1f01fd15975274f8e47458c185a
Headers show
Series ARM: dts: stm32: add STM32F746 syscfg clock | expand

Commit Message

Ben Wolsieffer Nov. 1, 2023, 3:51 p.m. UTC
The syscfg syscon was missing its clock, therefore any attempt to
read/write it after clk_disable_unused() silently failed. This was
preventing external pin interrupts from working if they were initialized
after this point.

Signed-off-by: Ben Wolsieffer <ben.wolsieffer@hefring.com>
---
 arch/arm/boot/dts/st/stm32f746.dtsi | 1 +
 1 file changed, 1 insertion(+)

Comments

Alexandre TORGUE Nov. 21, 2023, 1:29 p.m. UTC | #1
Hi Ben

On 11/1/23 16:51, Ben Wolsieffer wrote:
> The syscfg syscon was missing its clock, therefore any attempt to
> read/write it after clk_disable_unused() silently failed. This was
> preventing external pin interrupts from working if they were initialized
> after this point.
> 
> Signed-off-by: Ben Wolsieffer <ben.wolsieffer@hefring.com>
> ---
>   arch/arm/boot/dts/st/stm32f746.dtsi | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/boot/dts/st/stm32f746.dtsi b/arch/arm/boot/dts/st/stm32f746.dtsi
> index 4942753d011e..cce6ab0e4617 100644
> --- a/arch/arm/boot/dts/st/stm32f746.dtsi
> +++ b/arch/arm/boot/dts/st/stm32f746.dtsi
> @@ -501,6 +501,7 @@ sdio1: mmc@40012c00 {
>   		syscfg: syscon@40013800 {
>   			compatible = "st,stm32-syscfg", "syscon";
>   			reg = <0x40013800 0x400>;
> +			clocks = <&rcc 0 STM32F7_APB2_CLOCK(SYSCFG)>;
>   		};
>   
>   		exti: interrupt-controller@40013c00 {
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/st/stm32f746.dtsi b/arch/arm/boot/dts/st/stm32f746.dtsi
index 4942753d011e..cce6ab0e4617 100644
--- a/arch/arm/boot/dts/st/stm32f746.dtsi
+++ b/arch/arm/boot/dts/st/stm32f746.dtsi
@@ -501,6 +501,7 @@  sdio1: mmc@40012c00 {
 		syscfg: syscon@40013800 {
 			compatible = "st,stm32-syscfg", "syscon";
 			reg = <0x40013800 0x400>;
+			clocks = <&rcc 0 STM32F7_APB2_CLOCK(SYSCFG)>;
 		};
 
 		exti: interrupt-controller@40013c00 {