| Message ID | 20231110065029.2117212-3-quic_skakitap@quicinc.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add runtime PM support for videocc on SM8150 | expand |
On 11/10/23 12:49, Bryan O'Donoghue wrote: > On 10/11/2023 06:50, Satya Priya Kakitapalli wrote: >> Add all the available resets for the video clock controller >> on sm8150. >> >> Fixes: 5658e8cf1a8a ("clk: qcom: add video clock controller driver for SM8150") >> Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> >> --- >> drivers/clk/qcom/videocc-sm8150.c | 4 ++++ >> 1 file changed, 4 insertions(+) >> >> diff --git a/drivers/clk/qcom/videocc-sm8150.c b/drivers/clk/qcom/videocc-sm8150.c >> index 1afdbe4a249d..6a5f89f53da8 100644 >> --- a/drivers/clk/qcom/videocc-sm8150.c >> +++ b/drivers/clk/qcom/videocc-sm8150.c >> @@ -214,6 +214,10 @@ static const struct regmap_config video_cc_sm8150_regmap_config = { >> static const struct qcom_reset_map video_cc_sm8150_resets[] = { >> [VIDEO_CC_MVSC_CORE_CLK_BCR] = { 0x850, 2 }, >> + [VIDEO_CC_INTERFACE_BCR] = { 0x8f0 }, >> + [VIDEO_CC_MVS0_BCR] = { 0x870 }, >> + [VIDEO_CC_MVS1_BCR] = { 0x8b0 }, >> + [VIDEO_CC_MVSC_BCR] = { 0x810 }, > > Are you sure this shouldn't be > > + [VIDEO_CC_INTERFACE_BCR] = { 0x9ac }, > + [VIDEO_CC_MVS0_BCR] = { 0x870 }, > + [VIDEO_CC_MVS1_BCR] = { 0x8b0 }, > + [VIDEO_CC_MVSC_BCR] = { 0x810 }, FWIW this seems to be a copypaste from https://git.codelinaro.org/clo/la/kernel/msm-5.4/-/blame/92b31370d31d22e910120f6a875bf0919b3f1773/drivers/clk/qcom/videocc-sm8150.c so if it's an issue, it should probably be fixed downstream too Konrad
On 15/11/2023 16:48, Konrad Dybcio wrote: >> + [VIDEO_CC_INTERFACE_BCR] = { 0x9ac }, >> + [VIDEO_CC_MVS0_BCR] = { 0x870 }, >> + [VIDEO_CC_MVS1_BCR] = { 0x8b0 }, >> + [VIDEO_CC_MVSC_BCR] = { 0x810 }, > FWIW this seems to be a copypaste from > > https://git.codelinaro.org/clo/la/kernel/msm-5.4/-/blame/92b31370d31d22e910120f6a875bf0919b3f1773/drivers/clk/qcom/videocc-sm8150.c > > so if it's an issue, it should probably be fixed downstream too More of a question than a gotcha - 0x9ac is valid for sm8250 so curious to me that its a different address on sm8150. --- bod
On 11/15/2023 10:39 PM, Bryan O'Donoghue wrote: > On 15/11/2023 16:48, Konrad Dybcio wrote: >>> + [VIDEO_CC_INTERFACE_BCR] = { 0x9ac }, >>> + [VIDEO_CC_MVS0_BCR] = { 0x870 }, >>> + [VIDEO_CC_MVS1_BCR] = { 0x8b0 }, >>> + [VIDEO_CC_MVSC_BCR] = { 0x810 }, >> FWIW this seems to be a copypaste from >> >> https://git.codelinaro.org/clo/la/kernel/msm-5.4/-/blame/92b31370d31d22e910120f6a875bf0919b3f1773/drivers/clk/qcom/videocc-sm8150.c >> >> >> so if it's an issue, it should probably be fixed downstream too > > More of a question than a gotcha - 0x9ac is valid for sm8250 so > curious to me that its a different address on sm8150. I have re-checked the offset values, as per the HW plan for SM8150 below values are correct: + [VIDEO_CC_INTERFACE_BCR] = { 0x8f0 }, + [VIDEO_CC_MVS0_BCR] = { 0x870 }, + [VIDEO_CC_MVS1_BCR] = { 0x8b0 }, + [VIDEO_CC_MVSC_BCR] = { 0x810 }, > --- > bod
diff --git a/drivers/clk/qcom/videocc-sm8150.c b/drivers/clk/qcom/videocc-sm8150.c index 1afdbe4a249d..6a5f89f53da8 100644 --- a/drivers/clk/qcom/videocc-sm8150.c +++ b/drivers/clk/qcom/videocc-sm8150.c @@ -214,6 +214,10 @@ static const struct regmap_config video_cc_sm8150_regmap_config = { static const struct qcom_reset_map video_cc_sm8150_resets[] = { [VIDEO_CC_MVSC_CORE_CLK_BCR] = { 0x850, 2 }, + [VIDEO_CC_INTERFACE_BCR] = { 0x8f0 }, + [VIDEO_CC_MVS0_BCR] = { 0x870 }, + [VIDEO_CC_MVS1_BCR] = { 0x8b0 }, + [VIDEO_CC_MVSC_BCR] = { 0x810 }, }; static const struct qcom_cc_desc video_cc_sm8150_desc = {
Add all the available resets for the video clock controller on sm8150. Fixes: 5658e8cf1a8a ("clk: qcom: add video clock controller driver for SM8150") Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> --- drivers/clk/qcom/videocc-sm8150.c | 4 ++++ 1 file changed, 4 insertions(+)