diff mbox series

[1/2] dt-bindings: watchdog: mediatek,mtk-wdt: add MT7988 watchdog and toprgu

Message ID 6912f6f406bc45674020681184f3eeca2f2cb63f.1699576174.git.daniel@makrotopia.org
State New
Headers show
Series [1/2] dt-bindings: watchdog: mediatek,mtk-wdt: add MT7988 watchdog and toprgu | expand

Commit Message

Daniel Golle Nov. 10, 2023, 12:30 a.m. UTC
Add binding description for mediatek,mt7988-wdt.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
 .../bindings/watchdog/mediatek,mtk-wdt.yaml          |  1 +
 include/dt-bindings/reset/mediatek,mt7988-resets.h   | 12 ++++++++++++
 2 files changed, 13 insertions(+)
 create mode 100644 include/dt-bindings/reset/mediatek,mt7988-resets.h

Comments

Krzysztof Kozlowski Nov. 10, 2023, 8:09 a.m. UTC | #1
On 10/11/2023 01:30, Daniel Golle wrote:
> Add binding description for mediatek,mt7988-wdt.
> 
> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
> ---

...

> diff --git a/include/dt-bindings/reset/mediatek,mt7988-resets.h b/include/dt-bindings/reset/mediatek,mt7988-resets.h
> new file mode 100644
> index 0000000000000..fa7c937505e08
> --- /dev/null
> +++ b/include/dt-bindings/reset/mediatek,mt7988-resets.h
> @@ -0,0 +1,12 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> +
> +/* TOPRGU resets */
> +#define MT7988_TOPRGU_SGMII0_GRST		1
> +#define MT7988_TOPRGU_SGMII1_GRST		2
> +#define MT7988_TOPRGU_XFI0_GRST			12
> +#define MT7988_TOPRGU_XFI1_GRST			13
> +#define MT7988_TOPRGU_XFI_PEXTP0_GRST		14
> +#define MT7988_TOPRGU_XFI_PEXTP1_GRST		15
> +#define MT7988_TOPRGU_XFI_PLL_GRST		16

IDs should start from 0 or 1 and increment by 1. If these are not IDs,
then you do not need them in the bindings.

Where is the driver change using these IDs?

> +
> +#define MT7988_TOPRGU_SW_RST_NUM		24

Why 24? I see 7. Why having it in the bindings in the first place.

It's quite likely I asked the same question about other bindings for
Mediatek. I will be asking every time till this is fixed.

Best regards,
Krzysztof
AngeloGioacchino Del Regno Nov. 10, 2023, 11:56 a.m. UTC | #2
Il 10/11/23 01:30, Daniel Golle ha scritto:
> Add binding description for mediatek,mt7988-wdt.
> 
> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
> ---
>   .../bindings/watchdog/mediatek,mtk-wdt.yaml          |  1 +
>   include/dt-bindings/reset/mediatek,mt7988-resets.h   | 12 ++++++++++++
>   2 files changed, 13 insertions(+)
>   create mode 100644 include/dt-bindings/reset/mediatek,mt7988-resets.h
> 
> diff --git a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
> index cc502838bc398..8d2520241e37f 100644
> --- a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
> +++ b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
> @@ -25,6 +25,7 @@ properties:
>             - mediatek,mt6735-wdt
>             - mediatek,mt6795-wdt
>             - mediatek,mt7986-wdt
> +          - mediatek,mt7988-wdt
>             - mediatek,mt8183-wdt
>             - mediatek,mt8186-wdt
>             - mediatek,mt8188-wdt
> diff --git a/include/dt-bindings/reset/mediatek,mt7988-resets.h b/include/dt-bindings/reset/mediatek,mt7988-resets.h
> new file mode 100644
> index 0000000000000..fa7c937505e08
> --- /dev/null
> +++ b/include/dt-bindings/reset/mediatek,mt7988-resets.h
> @@ -0,0 +1,12 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> +
> +/* TOPRGU resets */

The first reset is zero, the second reset is one.

Where's the zero'th reset? :-)

Regards,
Angelo

> +#define MT7988_TOPRGU_SGMII0_GRST		1
> +#define MT7988_TOPRGU_SGMII1_GRST		2
> +#define MT7988_TOPRGU_XFI0_GRST			12
> +#define MT7988_TOPRGU_XFI1_GRST			13
> +#define MT7988_TOPRGU_XFI_PEXTP0_GRST		14
> +#define MT7988_TOPRGU_XFI_PEXTP1_GRST		15
> +#define MT7988_TOPRGU_XFI_PLL_GRST		16
> +
> +#define MT7988_TOPRGU_SW_RST_NUM		24
Daniel Golle Nov. 10, 2023, 2:17 p.m. UTC | #3
On Fri, Nov 10, 2023 at 12:56:18PM +0100, AngeloGioacchino Del Regno wrote:
> Il 10/11/23 01:30, Daniel Golle ha scritto:
> > Add binding description for mediatek,mt7988-wdt.
> > 
> > Signed-off-by: Daniel Golle <daniel@makrotopia.org>
> > ---
> >   .../bindings/watchdog/mediatek,mtk-wdt.yaml          |  1 +
> >   include/dt-bindings/reset/mediatek,mt7988-resets.h   | 12 ++++++++++++
> >   2 files changed, 13 insertions(+)
> >   create mode 100644 include/dt-bindings/reset/mediatek,mt7988-resets.h
> > 
> > diff --git a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
> > index cc502838bc398..8d2520241e37f 100644
> > --- a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
> > +++ b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
> > @@ -25,6 +25,7 @@ properties:
> >             - mediatek,mt6735-wdt
> >             - mediatek,mt6795-wdt
> >             - mediatek,mt7986-wdt
> > +          - mediatek,mt7988-wdt
> >             - mediatek,mt8183-wdt
> >             - mediatek,mt8186-wdt
> >             - mediatek,mt8188-wdt
> > diff --git a/include/dt-bindings/reset/mediatek,mt7988-resets.h b/include/dt-bindings/reset/mediatek,mt7988-resets.h
> > new file mode 100644
> > index 0000000000000..fa7c937505e08
> > --- /dev/null
> > +++ b/include/dt-bindings/reset/mediatek,mt7988-resets.h
> > @@ -0,0 +1,12 @@
> > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> > +
> > +/* TOPRGU resets */
> 
> The first reset is zero, the second reset is one.
> 
> Where's the zero'th reset? :-)

Currently the reset numbers represent the corresponding bit positions in
the toprgu register, as this is how the mtk-wdt driver is organized.

So there is probably something at bit 0, and also at bit 3~11 and
maybe also 17~23, but it's unknown and may be added later once known
and/or needed.

> 
> Regards,
> Angelo
> 
> > +#define MT7988_TOPRGU_SGMII0_GRST		1
> > +#define MT7988_TOPRGU_SGMII1_GRST		2
> > +#define MT7988_TOPRGU_XFI0_GRST			12
> > +#define MT7988_TOPRGU_XFI1_GRST			13
> > +#define MT7988_TOPRGU_XFI_PEXTP0_GRST		14
> > +#define MT7988_TOPRGU_XFI_PEXTP1_GRST		15
> > +#define MT7988_TOPRGU_XFI_PLL_GRST		16
> > +
> > +#define MT7988_TOPRGU_SW_RST_NUM		24
> 
>
Daniel Golle Nov. 10, 2023, 2:40 p.m. UTC | #4
On Fri, Nov 10, 2023 at 03:20:53PM +0100, Krzysztof Kozlowski wrote:
> On 10/11/2023 15:17, Daniel Golle wrote:
> > On Fri, Nov 10, 2023 at 12:56:18PM +0100, AngeloGioacchino Del Regno wrote:
> >> Il 10/11/23 01:30, Daniel Golle ha scritto:
> >>> Add binding description for mediatek,mt7988-wdt.
> >>>
> >>> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
> >>> ---
> >>>   .../bindings/watchdog/mediatek,mtk-wdt.yaml          |  1 +
> >>>   include/dt-bindings/reset/mediatek,mt7988-resets.h   | 12 ++++++++++++
> >>>   2 files changed, 13 insertions(+)
> >>>   create mode 100644 include/dt-bindings/reset/mediatek,mt7988-resets.h
> >>>
> >>> diff --git a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
> >>> index cc502838bc398..8d2520241e37f 100644
> >>> --- a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
> >>> +++ b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
> >>> @@ -25,6 +25,7 @@ properties:
> >>>             - mediatek,mt6735-wdt
> >>>             - mediatek,mt6795-wdt
> >>>             - mediatek,mt7986-wdt
> >>> +          - mediatek,mt7988-wdt
> >>>             - mediatek,mt8183-wdt
> >>>             - mediatek,mt8186-wdt
> >>>             - mediatek,mt8188-wdt
> >>> diff --git a/include/dt-bindings/reset/mediatek,mt7988-resets.h b/include/dt-bindings/reset/mediatek,mt7988-resets.h
> >>> new file mode 100644
> >>> index 0000000000000..fa7c937505e08
> >>> --- /dev/null
> >>> +++ b/include/dt-bindings/reset/mediatek,mt7988-resets.h
> >>> @@ -0,0 +1,12 @@
> >>> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> >>> +
> >>> +/* TOPRGU resets */
> >>
> >> The first reset is zero, the second reset is one.
> >>
> >> Where's the zero'th reset? :-)
> > 
> > Currently the reset numbers represent the corresponding bit positions in
> > the toprgu register, as this is how the mtk-wdt driver is organized.
> > 
> > So there is probably something at bit 0, and also at bit 3~11 and
> > maybe also 17~23, but it's unknown and may be added later once known
> > and/or needed.
> 
> There is no need to put register bits, which are not used by the driver,
> in the bindings.

There aren't. That's why there isn't a zero'th reset (and also not 3~11, 17~24).

Or should the driver be reorganized to provide a mapping of logical to
physical resets, and then have only the needed once present and start
counting logical resets from 0? This is doable, of course, but it's a
bit of effort just for the aesthetical goal of starting to count from
zero and continous in header file.

And, of course, chances are that other currently still unused bits
will be needed at a later point which then would mean having to add
them in at least 2 places (header file and mapping logical<->physical)
where as currently it would just mean adding a line defining it in the
header file.

A quick looks at all the other headers in
include/dt-binding/reset/mt*-resets.h also shows that currently all of
them have unused bits and e.g. infracfg on MT7986 starts counting from
6.

> 
> Best regards,
> Krzysztof
>
Daniel Golle Nov. 10, 2023, 2:51 p.m. UTC | #5
On Fri, Nov 10, 2023 at 03:46:14PM +0100, Krzysztof Kozlowski wrote:
> On 10/11/2023 15:40, Daniel Golle wrote:
> > On Fri, Nov 10, 2023 at 03:20:53PM +0100, Krzysztof Kozlowski wrote:
> >> On 10/11/2023 15:17, Daniel Golle wrote:
> >>> On Fri, Nov 10, 2023 at 12:56:18PM +0100, AngeloGioacchino Del Regno wrote:
> >>>> Il 10/11/23 01:30, Daniel Golle ha scritto:
> >>>>> Add binding description for mediatek,mt7988-wdt.
> >>>>>
> >>>>> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
> >>>>> ---
> >>>>>   .../bindings/watchdog/mediatek,mtk-wdt.yaml          |  1 +
> >>>>>   include/dt-bindings/reset/mediatek,mt7988-resets.h   | 12 ++++++++++++
> >>>>>   2 files changed, 13 insertions(+)
> >>>>>   create mode 100644 include/dt-bindings/reset/mediatek,mt7988-resets.h
> >>>>>
> >>>>> diff --git a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
> >>>>> index cc502838bc398..8d2520241e37f 100644
> >>>>> --- a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
> >>>>> +++ b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
> >>>>> @@ -25,6 +25,7 @@ properties:
> >>>>>             - mediatek,mt6735-wdt
> >>>>>             - mediatek,mt6795-wdt
> >>>>>             - mediatek,mt7986-wdt
> >>>>> +          - mediatek,mt7988-wdt
> >>>>>             - mediatek,mt8183-wdt
> >>>>>             - mediatek,mt8186-wdt
> >>>>>             - mediatek,mt8188-wdt
> >>>>> diff --git a/include/dt-bindings/reset/mediatek,mt7988-resets.h b/include/dt-bindings/reset/mediatek,mt7988-resets.h
> >>>>> new file mode 100644
> >>>>> index 0000000000000..fa7c937505e08
> >>>>> --- /dev/null
> >>>>> +++ b/include/dt-bindings/reset/mediatek,mt7988-resets.h
> >>>>> @@ -0,0 +1,12 @@
> >>>>> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> >>>>> +
> >>>>> +/* TOPRGU resets */
> >>>>
> >>>> The first reset is zero, the second reset is one.
> >>>>
> >>>> Where's the zero'th reset? :-)
> >>>
> >>> Currently the reset numbers represent the corresponding bit positions in
> >>> the toprgu register, as this is how the mtk-wdt driver is organized.
> >>>
> >>> So there is probably something at bit 0, and also at bit 3~11 and
> >>> maybe also 17~23, but it's unknown and may be added later once known
> >>> and/or needed.
> >>
> >> There is no need to put register bits, which are not used by the driver,
> >> in the bindings.
> > 
> > There aren't. That's why there isn't a zero'th reset (and also not 3~11, 17~24).
> > 
> > Or should the driver be reorganized to provide a mapping of logical to
> > physical resets, and then have only the needed once present and start
> > counting logical resets from 0? This is doable, of course, but it's a
> > bit of effort just for the aesthetical goal of starting to count from
> > zero and continous in header file.
> > 
> > And, of course, chances are that other currently still unused bits
> > will be needed at a later point which then would mean having to add
> > them in at least 2 places (header file and mapping logical<->physical)
> > where as currently it would just mean adding a line defining it in the
> > header file.
> 
> You can do it, but it's not what I wrote here. So bear with me:
> 
> "There is no need to put register bits in the bindings."
> 
> You replied "There aren't", which I don't understand in this context. I
> can be clearer:
> Drop this hunk.

So adding the file to include/dt-bindings/reset/ should go into a
seperate patch? Because including it with the driver itself gave me
a checkpath warning telling me that dt-bindings should go seperate,
which is why I included it with the binding docs.

> 
> > 
> > A quick looks at all the other headers in
> > include/dt-binding/reset/mt*-resets.h also shows that currently all of
> > them have unused bits and e.g. infracfg on MT7986 starts counting from
> > 6.
> 
> Best regards,
> Krzysztof
> 
>
Krzysztof Kozlowski Nov. 10, 2023, 3:07 p.m. UTC | #6
On 10/11/2023 15:51, Daniel Golle wrote:
> On Fri, Nov 10, 2023 at 03:46:14PM +0100, Krzysztof Kozlowski wrote:
>> On 10/11/2023 15:40, Daniel Golle wrote:
>>> On Fri, Nov 10, 2023 at 03:20:53PM +0100, Krzysztof Kozlowski wrote:
>>>> On 10/11/2023 15:17, Daniel Golle wrote:
>>>>> On Fri, Nov 10, 2023 at 12:56:18PM +0100, AngeloGioacchino Del Regno wrote:
>>>>>> Il 10/11/23 01:30, Daniel Golle ha scritto:
>>>>>>> Add binding description for mediatek,mt7988-wdt.
>>>>>>>
>>>>>>> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
>>>>>>> ---
>>>>>>>   .../bindings/watchdog/mediatek,mtk-wdt.yaml          |  1 +
>>>>>>>   include/dt-bindings/reset/mediatek,mt7988-resets.h   | 12 ++++++++++++
>>>>>>>   2 files changed, 13 insertions(+)
>>>>>>>   create mode 100644 include/dt-bindings/reset/mediatek,mt7988-resets.h
>>>>>>>
>>>>>>> diff --git a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
>>>>>>> index cc502838bc398..8d2520241e37f 100644
>>>>>>> --- a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
>>>>>>> +++ b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
>>>>>>> @@ -25,6 +25,7 @@ properties:
>>>>>>>             - mediatek,mt6735-wdt
>>>>>>>             - mediatek,mt6795-wdt
>>>>>>>             - mediatek,mt7986-wdt
>>>>>>> +          - mediatek,mt7988-wdt
>>>>>>>             - mediatek,mt8183-wdt
>>>>>>>             - mediatek,mt8186-wdt
>>>>>>>             - mediatek,mt8188-wdt
>>>>>>> diff --git a/include/dt-bindings/reset/mediatek,mt7988-resets.h b/include/dt-bindings/reset/mediatek,mt7988-resets.h
>>>>>>> new file mode 100644
>>>>>>> index 0000000000000..fa7c937505e08
>>>>>>> --- /dev/null
>>>>>>> +++ b/include/dt-bindings/reset/mediatek,mt7988-resets.h
>>>>>>> @@ -0,0 +1,12 @@
>>>>>>> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
>>>>>>> +
>>>>>>> +/* TOPRGU resets */
>>>>>>
>>>>>> The first reset is zero, the second reset is one.
>>>>>>
>>>>>> Where's the zero'th reset? :-)
>>>>>
>>>>> Currently the reset numbers represent the corresponding bit positions in
>>>>> the toprgu register, as this is how the mtk-wdt driver is organized.
>>>>>
>>>>> So there is probably something at bit 0, and also at bit 3~11 and
>>>>> maybe also 17~23, but it's unknown and may be added later once known
>>>>> and/or needed.
>>>>
>>>> There is no need to put register bits, which are not used by the driver,
>>>> in the bindings.
>>>
>>> There aren't. That's why there isn't a zero'th reset (and also not 3~11, 17~24).
>>>
>>> Or should the driver be reorganized to provide a mapping of logical to
>>> physical resets, and then have only the needed once present and start
>>> counting logical resets from 0? This is doable, of course, but it's a
>>> bit of effort just for the aesthetical goal of starting to count from
>>> zero and continous in header file.
>>>
>>> And, of course, chances are that other currently still unused bits
>>> will be needed at a later point which then would mean having to add
>>> them in at least 2 places (header file and mapping logical<->physical)
>>> where as currently it would just mean adding a line defining it in the
>>> header file.
>>
>> You can do it, but it's not what I wrote here. So bear with me:
>>
>> "There is no need to put register bits in the bindings."

No comments here, so I assume you agree with this.

>>
>> You replied "There aren't", which I don't understand in this context. I
>> can be clearer:
>> Drop this hunk.
> 
> So adding the file to include/dt-bindings/reset/ should go into a
> seperate patch? Because including it with the driver itself gave me
> a checkpath warning telling me that dt-bindings should go seperate,
> which is why I included it with the binding docs.

No, I said the hunk should be dropped. Removed.

Best regards,
Krzysztof
Krzysztof Kozlowski Nov. 10, 2023, 3:20 p.m. UTC | #7
On 10/11/2023 09:09, Krzysztof Kozlowski wrote:
> On 10/11/2023 01:30, Daniel Golle wrote:
>> Add binding description for mediatek,mt7988-wdt.
>>
>> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
>> ---
> 
> ...
> 
>> diff --git a/include/dt-bindings/reset/mediatek,mt7988-resets.h b/include/dt-bindings/reset/mediatek,mt7988-resets.h
>> new file mode 100644
>> index 0000000000000..fa7c937505e08
>> --- /dev/null
>> +++ b/include/dt-bindings/reset/mediatek,mt7988-resets.h
>> @@ -0,0 +1,12 @@
>> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
>> +
>> +/* TOPRGU resets */
>> +#define MT7988_TOPRGU_SGMII0_GRST		1
>> +#define MT7988_TOPRGU_SGMII1_GRST		2
>> +#define MT7988_TOPRGU_XFI0_GRST			12
>> +#define MT7988_TOPRGU_XFI1_GRST			13
>> +#define MT7988_TOPRGU_XFI_PEXTP0_GRST		14
>> +#define MT7988_TOPRGU_XFI_PEXTP1_GRST		15
>> +#define MT7988_TOPRGU_XFI_PLL_GRST		16
> 
> IDs should start from 0 or 1 and increment by 1. If these are not IDs,
> then you do not need them in the bindings.
> 
> Where is the driver change using these IDs?

You nicely skipped my email and keep pushing the idea of putting this
into separate patch.

No. Respond to received comments.

> 
>> +
>> +#define MT7988_TOPRGU_SW_RST_NUM		24
> 
> Why 24? I see 7. Why having it in the bindings in the first place.
> 
> It's quite likely I asked the same question about other bindings for
> Mediatek. I will be asking every time till this is fixed.

No response to this, either.

Best regards,
Krzysztof
Krzysztof Kozlowski Nov. 10, 2023, 3:21 p.m. UTC | #8
On 10/11/2023 16:15, Krzysztof Kozlowski wrote:
>>>> So adding the file to include/dt-bindings/reset/ should go into a
>>>> seperate patch? Because including it with the driver itself gave me
>>>> a checkpath warning telling me that dt-bindings should go seperate,
>>>> which is why I included it with the binding docs.
>>>
>>> No, I said the hunk should be dropped. Removed.
>>
>> I guess we are somehow misunderstanding each other.
>> Lets go with an example. I can put the header into a commit of its own,
>> just like commit
>> 5794dda109fc8 dt-bindings: reset: mt7986: Add reset-controller header file
>> https://lore.kernel.org/r/20220105100456.7126-2-sam.shih@mediatek.com
>>
>> Would that be acceptable? And if not, why?
> 
> ...this question.
> 
> Again, whether this is separate patch - it is still hunk which I think
> should be removed. I gave the reason "why" in this mail thread and in
> multiple other discussions.

I gave you clear reasoning 7 hours ago:
https://lore.kernel.org/all/59629ec1-cc0c-4c5a-87cc-ea30d64ec191@linaro.org/
to which you did not respond.

Best regards,
Krzysztof
Daniel Golle Nov. 10, 2023, 5:07 p.m. UTC | #9
On Fri, Nov 10, 2023 at 04:21:35PM +0100, Krzysztof Kozlowski wrote:
> On 10/11/2023 16:15, Krzysztof Kozlowski wrote:
> >>>> So adding the file to include/dt-bindings/reset/ should go into a
> >>>> seperate patch? Because including it with the driver itself gave me
> >>>> a checkpath warning telling me that dt-bindings should go seperate,
> >>>> which is why I included it with the binding docs.
> >>>
> >>> No, I said the hunk should be dropped. Removed.
> >>
> >> I guess we are somehow misunderstanding each other.
> >> Lets go with an example. I can put the header into a commit of its own,
> >> just like commit
> >> 5794dda109fc8 dt-bindings: reset: mt7986: Add reset-controller header file
> >> https://lore.kernel.org/r/20220105100456.7126-2-sam.shih@mediatek.com
> >>
> >> Would that be acceptable? And if not, why?
> > 
> > ...this question.

... which you didn't answer. Sorry, but it's not helpful to be polemic
or ironic in a code review involving non-native English speakers
trying to understand each others.

> > 
> > Again, whether this is separate patch - it is still hunk which I think
> > should be removed. I gave the reason "why" in this mail thread and in
> > multiple other discussions.
> 
> I gave you clear reasoning 7 hours ago:
> https://lore.kernel.org/all/59629ec1-cc0c-4c5a-87cc-ea30d64ec191@linaro.org/
> to which you did not respond.

Because it doesn't match anything existing regarding MediaTek reset
drivers, and I was assuming there must be some kind of misunderstanding,
which is why I replied to your later email in the same thread.

My assumption that the problem was merely having documentation and
header combined in a single commit stems from the fact that a very
similar patch for MT7986[1] was Ack'ed by Rob Herring about a year and
a half ago; hence the rule you apply here may have always existed, but
apparently then hasn't been applied in the past.

Literally *all* existing dt-binding headers for MediaTek SoCs follow a
direct 1:1 mapping of reset bit in hardware and reset number in the
header files. The driver is simple, all it cares about is the maximum
number defined in the header (and I like that, because it makes it very
easy to add new SoCs). At this point the abstraction needed to
fulfill your request doesn't exist, not for any of the SoCs using
mtk_wdt.c. It can be implemented, surely, it's a problem computers can
solve. If that's what you (and current maintainers of that driver)
would want me to implement, please say so clearly and spell it out.

Also be clear about if all the other existing headers need to be
converted, mappings for all SoCs created in the driver, ... all before
support for MT7988 can go in?
Or should the existing headers for other MediaTek SoCs remain
untouched because they are already considered stable API or something?


Thank you for your patiente!


Daniel


[1]: https://lore.kernel.org/all/Yd4uplioThv8eJJE@robh.at.kernel.org/
Krzysztof Kozlowski Nov. 10, 2023, 8 p.m. UTC | #10
On 10/11/2023 16:20, Krzysztof Kozlowski wrote:
> On 10/11/2023 09:09, Krzysztof Kozlowski wrote:
>> On 10/11/2023 01:30, Daniel Golle wrote:
>>> Add binding description for mediatek,mt7988-wdt.
>>>
>>> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
>>> ---
>>
>> ...
>>
>>> diff --git a/include/dt-bindings/reset/mediatek,mt7988-resets.h b/include/dt-bindings/reset/mediatek,mt7988-resets.h
>>> new file mode 100644
>>> index 0000000000000..fa7c937505e08
>>> --- /dev/null
>>> +++ b/include/dt-bindings/reset/mediatek,mt7988-resets.h
>>> @@ -0,0 +1,12 @@
>>> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
>>> +
>>> +/* TOPRGU resets */
>>> +#define MT7988_TOPRGU_SGMII0_GRST		1
>>> +#define MT7988_TOPRGU_SGMII1_GRST		2
>>> +#define MT7988_TOPRGU_XFI0_GRST			12
>>> +#define MT7988_TOPRGU_XFI1_GRST			13
>>> +#define MT7988_TOPRGU_XFI_PEXTP0_GRST		14
>>> +#define MT7988_TOPRGU_XFI_PEXTP1_GRST		15
>>> +#define MT7988_TOPRGU_XFI_PLL_GRST		16
>>
>> IDs should start from 0 or 1 and increment by 1. If these are not IDs,
>> then you do not need them in the bindings.
>>
>> Where is the driver change using these IDs?
> 
> You nicely skipped my email and keep pushing the idea of putting this
> into separate patch.
> 
> No. Respond to received comments.
> 
>>
>>> +
>>> +#define MT7988_TOPRGU_SW_RST_NUM		24
>>
>> Why 24? I see 7. Why having it in the bindings in the first place.
>>
>> It's quite likely I asked the same question about other bindings for
>> Mediatek. I will be asking every time till this is fixed.
> 
> No response to this, either.

You still did not respond here. To none of the points here. It's my
third ping because I want this to be resolved. But ignoring my emails,
and skipping paragraphs of my replies will not lead anywhere.

Best regards,
Krzysztof
Krzysztof Kozlowski Nov. 10, 2023, 8:21 p.m. UTC | #11
On 10/11/2023 21:18, Daniel Golle wrote:
> On Fri, Nov 10, 2023 at 08:58:57PM +0100, Krzysztof Kozlowski wrote:
>> I am repeating myself... but I don't know how to put it other way. I did
>> not ask you to rewrite your driver. I asked to drop the change to
>> bindings, because it is entirely pointless.
>>
>> Drop this change, only this. No need to rewrite drivers, they stay the same.
> 
> Dropping this change (I'm assuming you are referring to the hunk adding
> include/dt-bindings/reset/mt7988-resets.h) and also not adding that
> header file using a seperate commit means that there won't be a header
> defining the reset names.
> 
> The result would be having to numerically reference the specific
> resets in the device tree.

Which is a problem because? Do you see bindings for IO space? For
interrupts? For hundreds of other values? No, because the value is not a
binding.

DT binding binds the driver and DTS. If you have nothing in the driver,
there is no binding.

> 
> This is, of course, possible, but I don't understand what the advantage
> would be.

I pinged you three times on email I expect answer and there is nothing.
You ignored the thread completely.

I am finishing with this thread till you start answering emails.

Best regards,
Krzysztof
Daniel Golle Nov. 10, 2023, 8:45 p.m. UTC | #12
On Fri, Nov 10, 2023 at 09:00:26PM +0100, Krzysztof Kozlowski wrote:
> On 10/11/2023 16:20, Krzysztof Kozlowski wrote:
> > On 10/11/2023 09:09, Krzysztof Kozlowski wrote:
> >> On 10/11/2023 01:30, Daniel Golle wrote:
> >>> Add binding description for mediatek,mt7988-wdt.
> >>>
> >>> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
> >>> ---
> >>
> >> ...
> >>
> >>> diff --git a/include/dt-bindings/reset/mediatek,mt7988-resets.h b/include/dt-bindings/reset/mediatek,mt7988-resets.h
> >>> new file mode 100644
> >>> index 0000000000000..fa7c937505e08
> >>> --- /dev/null
> >>> +++ b/include/dt-bindings/reset/mediatek,mt7988-resets.h
> >>> @@ -0,0 +1,12 @@
> >>> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> >>> +
> >>> +/* TOPRGU resets */
> >>> +#define MT7988_TOPRGU_SGMII0_GRST		1
> >>> +#define MT7988_TOPRGU_SGMII1_GRST		2
> >>> +#define MT7988_TOPRGU_XFI0_GRST			12
> >>> +#define MT7988_TOPRGU_XFI1_GRST			13
> >>> +#define MT7988_TOPRGU_XFI_PEXTP0_GRST		14
> >>> +#define MT7988_TOPRGU_XFI_PEXTP1_GRST		15
> >>> +#define MT7988_TOPRGU_XFI_PLL_GRST		16
> >>
> >> IDs should start from 0 or 1 and increment by 1. If these are not IDs,
> >> then you do not need them in the bindings.
> >>
> >> Where is the driver change using these IDs?

It isn't needed as the driver doesn't list the IDs. If that would
be true, it would be sufficient to put them into a header next to the
driver or defined inside the driver C file.

The defined IDs here are intended to be used in device tree files.

> > 
> > You nicely skipped my email and keep pushing the idea of putting this
> > into separate patch.
> > 
> > No. Respond to received comments.
> > 
> >>
> >>> +
> >>> +#define MT7988_TOPRGU_SW_RST_NUM		24
> >>
> >> Why 24? I see 7. 

Because the wdt on MT7988 has a total of 24 resets. Most of them are
(currently, as there are no GPL drops, no publicly available devices,
...) undocumented and are not used in Linux **at this point**. Having
to change the driver every time a new reset is discovered or needed to
be used is tideous, so I thought the best would be -- as we know the
total number of resets -- to already define that, as it's safe to do
and won't need to change.

> >> Why having it in the bindings in the first place.

This line can indeed go into the driver, it's not used anywhere else.
I was merely immitating the style of all the existing binding headers
for similar SoCs and didn't want to stick-out style-wise, also in terms
of the added code to the driver which relies on that number being
defined in the header for all other SoCs.

> >>
> >> It's quite likely I asked the same question about other bindings for
> >> Mediatek. I will be asking every time till this is fixed.
> > 
> > No response to this, either.
> 
> You still did not respond here. To none of the points here. It's my
> third ping because I want this to be resolved. But ignoring my emails,
> and skipping paragraphs of my replies will not lead anywhere.

I have answered to this before:
The driver does NOT have any internal list of names of individual
resets, it relies on the reset number from device tree matching the bit
in the controller, just like for any other MediaTek toprgu already
supported by mtk-wdt.c.
Krzysztof Kozlowski Nov. 11, 2023, 7:55 a.m. UTC | #13
On 10/11/2023 21:45, Daniel Golle wrote:
> On Fri, Nov 10, 2023 at 09:00:26PM +0100, Krzysztof Kozlowski wrote:
>> On 10/11/2023 16:20, Krzysztof Kozlowski wrote:
>>> On 10/11/2023 09:09, Krzysztof Kozlowski wrote:
>>>> On 10/11/2023 01:30, Daniel Golle wrote:
>>>>> Add binding description for mediatek,mt7988-wdt.
>>>>>
>>>>> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
>>>>> ---
>>>>
>>>> ...
>>>>
>>>>> diff --git a/include/dt-bindings/reset/mediatek,mt7988-resets.h b/include/dt-bindings/reset/mediatek,mt7988-resets.h
>>>>> new file mode 100644
>>>>> index 0000000000000..fa7c937505e08
>>>>> --- /dev/null
>>>>> +++ b/include/dt-bindings/reset/mediatek,mt7988-resets.h
>>>>> @@ -0,0 +1,12 @@
>>>>> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
>>>>> +
>>>>> +/* TOPRGU resets */
>>>>> +#define MT7988_TOPRGU_SGMII0_GRST		1
>>>>> +#define MT7988_TOPRGU_SGMII1_GRST		2
>>>>> +#define MT7988_TOPRGU_XFI0_GRST			12
>>>>> +#define MT7988_TOPRGU_XFI1_GRST			13
>>>>> +#define MT7988_TOPRGU_XFI_PEXTP0_GRST		14
>>>>> +#define MT7988_TOPRGU_XFI_PEXTP1_GRST		15
>>>>> +#define MT7988_TOPRGU_XFI_PLL_GRST		16
>>>>
>>>> IDs should start from 0 or 1 and increment by 1. If these are not IDs,
>>>> then you do not need them in the bindings.
>>>>
>>>> Where is the driver change using these IDs?
> 
> It isn't needed as the driver doesn't list the IDs. If that would

Then it is no a binding.

> be true, it would be sufficient to put them into a header next to the
> driver or defined inside the driver C file.

Not related. Binding header is used by both driver and DTS.

> 
> The defined IDs here are intended to be used in device tree files.

Then not a binding.

> 
>>>
>>> You nicely skipped my email and keep pushing the idea of putting this
>>> into separate patch.
>>>
>>> No. Respond to received comments.
>>>
>>>>
>>>>> +
>>>>> +#define MT7988_TOPRGU_SW_RST_NUM		24
>>>>
>>>> Why 24? I see 7. 
> 
> Because the wdt on MT7988 has a total of 24 resets. Most of them are
> (currently, as there are no GPL drops, no publicly available devices,
> ...) undocumented and are not used in Linux **at this point**. Having
> to change the driver every time a new reset is discovered or needed to

There is no need to change the driver. Once it is set in the binding, to
let's say 7, it must stay like this. Since this is not representing real
binding resets (there are 7, not 24) and it is no used in DTS: this is
not a binding.


> be used is tideous, so I thought the best would be -- as we know the
> total number of resets -- to already define that, as it's safe to do
> and won't need to change.


> 
>>>> Why having it in the bindings in the first place.
> 
> This line can indeed go into the driver, it's not used anywhere else.
> I was merely immitating the style of all the existing binding headers
> for similar SoCs and didn't want to stick-out style-wise, also in terms
> of the added code to the driver which relies on that number being
> defined in the header for all other SoCs.
> 
>>>>
>>>> It's quite likely I asked the same question about other bindings for
>>>> Mediatek. I will be asking every time till this is fixed.
>>>
>>> No response to this, either.
>>
>> You still did not respond here. To none of the points here. It's my
>> third ping because I want this to be resolved. But ignoring my emails,
>> and skipping paragraphs of my replies will not lead anywhere.
> 
> I have answered to this before:
> The driver does NOT have any internal list of names of individual
> resets, it relies on the reset number from device tree matching the bit
> in the controller, just like for any other MediaTek toprgu already
> supported by mtk-wdt.c.

Sure, and this is not a binding. Please do not make binding things which
are not bindings, because later you (you as in plural) come and request
to change it, which must not be allowed. But because people stuff
not-binding-things into the binding they use it later as arguments that
it is allowed to change.

As I wrote before, I complained about this already several times and I
will be complaining every time.

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
index cc502838bc398..8d2520241e37f 100644
--- a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
+++ b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
@@ -25,6 +25,7 @@  properties:
           - mediatek,mt6735-wdt
           - mediatek,mt6795-wdt
           - mediatek,mt7986-wdt
+          - mediatek,mt7988-wdt
           - mediatek,mt8183-wdt
           - mediatek,mt8186-wdt
           - mediatek,mt8188-wdt
diff --git a/include/dt-bindings/reset/mediatek,mt7988-resets.h b/include/dt-bindings/reset/mediatek,mt7988-resets.h
new file mode 100644
index 0000000000000..fa7c937505e08
--- /dev/null
+++ b/include/dt-bindings/reset/mediatek,mt7988-resets.h
@@ -0,0 +1,12 @@ 
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+
+/* TOPRGU resets */
+#define MT7988_TOPRGU_SGMII0_GRST		1
+#define MT7988_TOPRGU_SGMII1_GRST		2
+#define MT7988_TOPRGU_XFI0_GRST			12
+#define MT7988_TOPRGU_XFI1_GRST			13
+#define MT7988_TOPRGU_XFI_PEXTP0_GRST		14
+#define MT7988_TOPRGU_XFI_PEXTP1_GRST		15
+#define MT7988_TOPRGU_XFI_PLL_GRST		16
+
+#define MT7988_TOPRGU_SW_RST_NUM		24