diff mbox series

[V4,1/4] mmc: solve DMA boundary limitation of CQHCI driver

Message ID 20231030062749.2840-2-jyanchou@realtek.com
State New
Headers show
Series Add DesignWare Mobile mmc driver | expand

Commit Message

Jyan Chou [周芷安] Oct. 30, 2023, 6:27 a.m. UTC
Due to synopsys data book's description, it had a limitation
while using DMA that buffer size and start address must not
exceed 128 MB.

We add an option setup_tran_desc to make tran_desc setting flexible.

Signed-off-by: Jyan Chou <jyanchou@realtek.com>

---
v2 -> v3:
- Fix auto test compile warning.

v1 -> v2:
- Export cqhci_set_tran_desc for setting the descriptor's callback function.

v0 -> v1:
- Separate different patch supports into single patch.
---
---
 drivers/mmc/host/cqhci-core.c | 8 +++++++-
 drivers/mmc/host/cqhci.h      | 5 +++++
 2 files changed, 12 insertions(+), 1 deletion(-)

Comments

Krzysztof Kozlowski Oct. 30, 2023, 7:35 a.m. UTC | #1
On 30/10/2023 07:27, Jyan Chou wrote:
> Due to synopsys data book's description, it had a limitation
> while using DMA that buffer size and start address must not
> exceed 128 MB.
> 
> We add an option setup_tran_desc to make tran_desc setting flexible.
> 
> Signed-off-by: Jyan Chou <jyanchou@realtek.com>
> 
> ---
> v2 -> v3:
> - Fix auto test compile warning.
> 
> v1 -> v2:
> - Export cqhci_set_tran_desc for setting the descriptor's callback function.
> 
> v0 -> v1:
> - Separate different patch supports into single patch.
> ---
> ---
>  drivers/mmc/host/cqhci-core.c | 8 +++++++-
>  drivers/mmc/host/cqhci.h      | 5 +++++
>  2 files changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/mmc/host/cqhci-core.c b/drivers/mmc/host/cqhci-core.c
> index b3d7d6d8d654..5560329d2a7d 100644
> --- a/drivers/mmc/host/cqhci-core.c
> +++ b/drivers/mmc/host/cqhci-core.c
> @@ -474,7 +474,7 @@ static int cqhci_dma_map(struct mmc_host *host, struct mmc_request *mrq)
>  	return sg_count;
>  }
>  
> -static void cqhci_set_tran_desc(u8 *desc, dma_addr_t addr, int len, bool end,
> +void cqhci_set_tran_desc(u8 *desc, dma_addr_t addr, int len, bool end,
>  				bool dma64)
>  {
>  	__le32 *attr = (__le32 __force *)desc;
> @@ -495,6 +495,7 @@ static void cqhci_set_tran_desc(u8 *desc, dma_addr_t addr, int len, bool end,
>  		dataddr[0] = cpu_to_le32(addr);
>  	}
>  }
> +EXPORT_SYMBOL(cqhci_set_tran_desc);

EXPORT_SYMBOL_GPL


Best regards,
Krzysztof
Jyan Chou [周芷安] Nov. 2, 2023, 8 a.m. UTC | #2
>> Due to synopsys data book's description, it had a limitation while 
>> using DMA that buffer size and start address must not exceed 128 MB.
>>
>> We add an option setup_tran_desc to make tran_desc setting flexible.
>>
>> Signed-off-by: Jyan Chou <jyanchou@realtek.com>
>>
>> ---
>> v2 -> v3:
>> - Fix auto test compile warning.
>>
>> v1 -> v2:
>> - Export cqhci_set_tran_desc for setting the descriptor's callback function.
>>
>> v0 -> v1:
>> - Separate different patch supports into single patch.
>> ---
>>  drivers/mmc/host/cqhci-core.c | 8 +++++++-
>>  drivers/mmc/host/cqhci.h      | 5 +++++
>>  2 files changed, 12 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/mmc/host/cqhci-core.c 
>> b/drivers/mmc/host/cqhci-core.c index b3d7d6d8d654..5560329d2a7d 
>> 100644
>> --- a/drivers/mmc/host/cqhci-core.c
>> +++ b/drivers/mmc/host/cqhci-core.c
>> @@ -474,7 +474,7 @@ static int cqhci_dma_map(struct mmc_host *host, struct mmc_request *mrq)
>>       return sg_count;
>>  }
>>
>> -static void cqhci_set_tran_desc(u8 *desc, dma_addr_t addr, int len, 
>> bool end,
>> +void cqhci_set_tran_desc(u8 *desc, dma_addr_t addr, int len, bool 
>> +end,
>>                               bool dma64)  {
>>       __le32 *attr = (__le32 __force *)desc; @@ -495,6 +495,7 @@ 
>> static void cqhci_set_tran_desc(u8 *desc, dma_addr_t addr, int len, bool end,
>>               dataddr[0] = cpu_to_le32(addr);
>>       }
>>  }
>> +EXPORT_SYMBOL(cqhci_set_tran_desc);

> EXPORT_SYMBOL_GPL

We had corrected it.

Best regards,
Jyan

-----Original Message-----
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 
Sent: Monday, October 30, 2023 3:35 PM
To: Jyan Chou [周芷安] <jyanchou@realtek.com>; ulf.hansson@linaro.org; adrian.hunter@intel.com; jh80.chung@samsung.com; riteshh@codeaurora.org; robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org; asutoshd@codeaurora.org; p.zabel@pengutronix.de
Cc: linux-mmc@vger.kernel.org; devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; arnd@arndb.de; briannorris@chromium.org; doug@schmorgal.com; tonyhuang.sunplus@gmail.com; abel.vesa@linaro.org; william.qiu@starfivetech.com
Subject: Re: [PATCH V4][1/4] mmc: solve DMA boundary limitation of CQHCI driver


External mail.



On 30/10/2023 07:27, Jyan Chou wrote:
> Due to synopsys data book's description, it had a limitation while 
> using DMA that buffer size and start address must not exceed 128 MB.
>
> We add an option setup_tran_desc to make tran_desc setting flexible.
>
> Signed-off-by: Jyan Chou <jyanchou@realtek.com>
>
> ---
> v2 -> v3:
> - Fix auto test compile warning.
>
> v1 -> v2:
> - Export cqhci_set_tran_desc for setting the descriptor's callback function.
>
> v0 -> v1:
> - Separate different patch supports into single patch.
> ---
> ---
>  drivers/mmc/host/cqhci-core.c | 8 +++++++-
>  drivers/mmc/host/cqhci.h      | 5 +++++
>  2 files changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/cqhci-core.c 
> b/drivers/mmc/host/cqhci-core.c index b3d7d6d8d654..5560329d2a7d 
> 100644
> --- a/drivers/mmc/host/cqhci-core.c
> +++ b/drivers/mmc/host/cqhci-core.c
> @@ -474,7 +474,7 @@ static int cqhci_dma_map(struct mmc_host *host, struct mmc_request *mrq)
>       return sg_count;
>  }
>
> -static void cqhci_set_tran_desc(u8 *desc, dma_addr_t addr, int len, 
> bool end,
> +void cqhci_set_tran_desc(u8 *desc, dma_addr_t addr, int len, bool 
> +end,
>                               bool dma64)  {
>       __le32 *attr = (__le32 __force *)desc; @@ -495,6 +495,7 @@ 
> static void cqhci_set_tran_desc(u8 *desc, dma_addr_t addr, int len, bool end,
>               dataddr[0] = cpu_to_le32(addr);
>       }
>  }
> +EXPORT_SYMBOL(cqhci_set_tran_desc);

EXPORT_SYMBOL_GPL


Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/drivers/mmc/host/cqhci-core.c b/drivers/mmc/host/cqhci-core.c
index b3d7d6d8d654..5560329d2a7d 100644
--- a/drivers/mmc/host/cqhci-core.c
+++ b/drivers/mmc/host/cqhci-core.c
@@ -474,7 +474,7 @@  static int cqhci_dma_map(struct mmc_host *host, struct mmc_request *mrq)
 	return sg_count;
 }
 
-static void cqhci_set_tran_desc(u8 *desc, dma_addr_t addr, int len, bool end,
+void cqhci_set_tran_desc(u8 *desc, dma_addr_t addr, int len, bool end,
 				bool dma64)
 {
 	__le32 *attr = (__le32 __force *)desc;
@@ -495,6 +495,7 @@  static void cqhci_set_tran_desc(u8 *desc, dma_addr_t addr, int len, bool end,
 		dataddr[0] = cpu_to_le32(addr);
 	}
 }
+EXPORT_SYMBOL(cqhci_set_tran_desc);
 
 static int cqhci_prep_tran_desc(struct mmc_request *mrq,
 			       struct cqhci_host *cq_host, int tag)
@@ -516,6 +517,11 @@  static int cqhci_prep_tran_desc(struct mmc_request *mrq,
 
 	desc = get_trans_desc(cq_host, tag);
 
+	if (cq_host->ops->setup_tran_desc) {
+		cq_host->ops->setup_tran_desc(data, cq_host, desc, sg_count);
+		return 0;
+	}
+
 	for_each_sg(data->sg, sg, sg_count, i) {
 		addr = sg_dma_address(sg);
 		len = sg_dma_len(sg);
diff --git a/drivers/mmc/host/cqhci.h b/drivers/mmc/host/cqhci.h
index 1a12e40a02e6..fded53fc2a0b 100644
--- a/drivers/mmc/host/cqhci.h
+++ b/drivers/mmc/host/cqhci.h
@@ -216,6 +216,7 @@  union cqhci_crypto_cfg_entry {
 struct cqhci_host_ops;
 struct mmc_host;
 struct mmc_request;
+struct mmc_data;
 struct cqhci_slot;
 
 struct cqhci_host {
@@ -289,6 +290,8 @@  struct cqhci_host_ops {
 				 u64 *data);
 	void (*pre_enable)(struct mmc_host *mmc);
 	void (*post_disable)(struct mmc_host *mmc);
+	void (*setup_tran_desc)(struct mmc_data *data,
+				struct cqhci_host *cq_host, u8 *desc, int sg_count);
 #ifdef CONFIG_MMC_CRYPTO
 	int (*program_key)(struct cqhci_host *cq_host,
 			   const union cqhci_crypto_cfg_entry *cfg, int slot);
@@ -322,6 +325,8 @@  static inline int cqhci_suspend(struct mmc_host *mmc)
 {
 	return cqhci_deactivate(mmc);
 }
+
+void cqhci_set_tran_desc(u8 *desc, dma_addr_t addr, int len, bool end, bool dma64);
 int cqhci_resume(struct mmc_host *mmc);
 
 #endif