| Message ID | 20231024162423.40206-1-philmd@linaro.org |
|---|---|
| Headers | show |
| Series | hw/arm/aspeed: Split AspeedSoCState per 2400/2600/10x0 | expand |
On 24/10/23 18:24, Philippe Mathieu-Daudé wrote: > Hi, > > This series is extracted for a bigger work. > > Cortex-A MP clusters (TYPE_A15MPCORE_PRIV) should create > the ARM cores in its own state. Unfortunately we don't do > it that way, and this model calls qemu_get_cpu(). > > In order to remove the qemu_get_cpu() call there, we first > need to rework some SoC users. > > This series rework the Aspeed SoC state, so it is clear > what fields are really used by a SoC type (2400 / 2600 / > 10x0). It will then be easier to have the MP cluster create > the core instances. Being a bit more verbose, as I was trying to explain to Cédric on IRC. The fby35 machine creates 2 SoCs: static void fby35_init(MachineState *machine) { Fby35State *s = FBY35(machine); fby35_bmc_init(s); fby35_bic_init(s); } - bmc is Aspeed2600 (A7 MPCORE) - bic is Aspeed10x0 (M7) If we were to create the bic before the bmc, as: static void fby35_init(MachineState *machine) { Fby35State *s = FBY35(machine); fby35_bic_init(s); fby35_bmc_init(s); } then the MPCORE misbehave as it calls qemu_get_cpu(0) which returns the M7 from the bic.
On 24/10/23 18:24, Philippe Mathieu-Daudé wrote: > Philippe Mathieu-Daudé (11): > hw/arm/aspeed: Extract code common to all boards to a common file > hw/arm/aspeed: Rename aspeed_soc_init() as AST2400/2500 specific > hw/arm/aspeed: Rename aspeed_soc_realize() as AST2400/2500 specific > hw/arm/aspeed: Dynamically allocate AspeedMachineState::soc field > hw/arm/aspeed: Introduce TYPE_ASPEED10X0_SOC > hw/arm/aspeed: Introduce TYPE_ASPEED2600_SOC > hw/arm/aspeed: Introduce TYPE_ASPEED2400_SOC > hw/arm/aspeed: Check 'memory' link is set in common aspeed_soc_realize > hw/arm/aspeed: Move AspeedSoCState::armv7m to Aspeed10x0SoCState > hw/arm/aspeed: Move AspeedSoCState::a7mpcore to Aspeed2600SoCState > hw/arm/aspeed: Move AspeedSoCState::cpu/vic to Aspeed2400SoCState Updating other reviewers, this series has been queued in Cédric's ASPEED queue.
Hi, This series is extracted for a bigger work. Cortex-A MP clusters (TYPE_A15MPCORE_PRIV) should create the ARM cores in its own state. Unfortunately we don't do it that way, and this model calls qemu_get_cpu(). In order to remove the qemu_get_cpu() call there, we first need to rework some SoC users. This series rework the Aspeed SoC state, so it is clear what fields are really used by a SoC type (2400 / 2600 / 10x0). It will then be easier to have the MP cluster create the core instances. Regards, Phil. Philippe Mathieu-Daudé (11): hw/arm/aspeed: Extract code common to all boards to a common file hw/arm/aspeed: Rename aspeed_soc_init() as AST2400/2500 specific hw/arm/aspeed: Rename aspeed_soc_realize() as AST2400/2500 specific hw/arm/aspeed: Dynamically allocate AspeedMachineState::soc field hw/arm/aspeed: Introduce TYPE_ASPEED10X0_SOC hw/arm/aspeed: Introduce TYPE_ASPEED2600_SOC hw/arm/aspeed: Introduce TYPE_ASPEED2400_SOC hw/arm/aspeed: Check 'memory' link is set in common aspeed_soc_realize hw/arm/aspeed: Move AspeedSoCState::armv7m to Aspeed10x0SoCState hw/arm/aspeed: Move AspeedSoCState::a7mpcore to Aspeed2600SoCState hw/arm/aspeed: Move AspeedSoCState::cpu/vic to Aspeed2400SoCState include/hw/arm/aspeed_soc.h | 35 +++- hw/arm/aspeed.c | 101 +++++------ hw/arm/aspeed_ast10x0.c | 53 +++--- hw/arm/{aspeed_soc.c => aspeed_ast2400.c} | 201 +++++----------------- hw/arm/aspeed_ast2600.c | 75 ++++---- hw/arm/aspeed_soc_common.c | 154 +++++++++++++++++ hw/arm/fby35.c | 27 +-- hw/arm/meson.build | 3 +- 8 files changed, 364 insertions(+), 285 deletions(-) rename hw/arm/{aspeed_soc.c => aspeed_ast2400.c} (76%) create mode 100644 hw/arm/aspeed_soc_common.c