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[v2,5/9] target/ppc: Use tcg_gen_extract_i32

Message ID 20231024165903.40861-6-philmd@linaro.org
State New
Headers show
Series tcg: Use tcg_gen_[s]extract_{i32,i64,tl} | expand

Commit Message

Philippe Mathieu-Daudé Oct. 24, 2023, 4:58 p.m. UTC
Inspired-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/ppc/translate.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

Comments

Nicholas Piggin Oct. 25, 2023, 7:10 a.m. UTC | #1
On Wed Oct 25, 2023 at 2:58 AM AEST, Philippe Mathieu-Daudé wrote:
> Inspired-by: Richard Henderson <richard.henderson@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Nicholas Piggin <npiggin@gmail.com>

> ---
>  target/ppc/translate.c | 6 ++----
>  1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index 329da4d518..c696fedbcc 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -4802,16 +4802,14 @@ static void gen_mtcrf(DisasContext *ctx)
>              TCGv_i32 temp = tcg_temp_new_i32();
>              crn = ctz32(crm);
>              tcg_gen_trunc_tl_i32(temp, cpu_gpr[rS(ctx->opcode)]);
> -            tcg_gen_shri_i32(temp, temp, crn * 4);
> -            tcg_gen_andi_i32(cpu_crf[7 - crn], temp, 0xf);
> +            tcg_gen_extract_i32(cpu_crf[7 - crn], temp, crn * 4, 4);
>          }
>      } else {
>          TCGv_i32 temp = tcg_temp_new_i32();
>          tcg_gen_trunc_tl_i32(temp, cpu_gpr[rS(ctx->opcode)]);
>          for (crn = 0 ; crn < 8 ; crn++) {
>              if (crm & (1 << crn)) {
> -                    tcg_gen_shri_i32(cpu_crf[7 - crn], temp, crn * 4);
> -                    tcg_gen_andi_i32(cpu_crf[7 - crn], cpu_crf[7 - crn], 0xf);
> +                tcg_gen_extract_i32(cpu_crf[7 - crn], temp, crn * 4, 4);
>              }
>          }
>      }
diff mbox series

Patch

diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 329da4d518..c696fedbcc 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -4802,16 +4802,14 @@  static void gen_mtcrf(DisasContext *ctx)
             TCGv_i32 temp = tcg_temp_new_i32();
             crn = ctz32(crm);
             tcg_gen_trunc_tl_i32(temp, cpu_gpr[rS(ctx->opcode)]);
-            tcg_gen_shri_i32(temp, temp, crn * 4);
-            tcg_gen_andi_i32(cpu_crf[7 - crn], temp, 0xf);
+            tcg_gen_extract_i32(cpu_crf[7 - crn], temp, crn * 4, 4);
         }
     } else {
         TCGv_i32 temp = tcg_temp_new_i32();
         tcg_gen_trunc_tl_i32(temp, cpu_gpr[rS(ctx->opcode)]);
         for (crn = 0 ; crn < 8 ; crn++) {
             if (crm & (1 << crn)) {
-                    tcg_gen_shri_i32(cpu_crf[7 - crn], temp, crn * 4);
-                    tcg_gen_andi_i32(cpu_crf[7 - crn], cpu_crf[7 - crn], 0xf);
+                tcg_gen_extract_i32(cpu_crf[7 - crn], temp, crn * 4, 4);
             }
         }
     }