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[4/9] target/ppc: Use tcg_gen_extract_i32

Message ID 20231023160944.10692-5-philmd@linaro.org
State Superseded
Headers show
Series tcg: Use tcg_gen_[s]extract_{i32,i64,tl} | expand

Commit Message

Philippe Mathieu-Daudé Oct. 23, 2023, 4:09 p.m. UTC 
Inspired-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/ppc/translate.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

Comments

Richard Henderson Oct. 23, 2023, 11:40 p.m. UTC | #1 
On 10/23/23 09:09, Philippe Mathieu-Daudé wrote:
> Inspired-by: Richard Henderson <richard.henderson@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   target/ppc/translate.c | 6 ++----
>   1 file changed, 2 insertions(+), 4 deletions(-)
> 
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index 329da4d518..c6e1f7c2ca 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -4802,16 +4802,14 @@ static void gen_mtcrf(DisasContext *ctx)
>               TCGv_i32 temp = tcg_temp_new_i32();
>               crn = ctz32(crm);
>               tcg_gen_trunc_tl_i32(temp, cpu_gpr[rS(ctx->opcode)]);
> -            tcg_gen_shri_i32(temp, temp, crn * 4);
> -            tcg_gen_andi_i32(cpu_crf[7 - crn], temp, 0xf);
> +            tcg_gen_extract_i32(cpu_crf[7 - crn], temp, crn * 4, 4);
>           }
>       } else {
>           TCGv_i32 temp = tcg_temp_new_i32();
>           tcg_gen_trunc_tl_i32(temp, cpu_gpr[rS(ctx->opcode)]);
>           for (crn = 0 ; crn < 8 ; crn++) {
>               if (crm & (1 << crn)) {
> -                    tcg_gen_shri_i32(cpu_crf[7 - crn], temp, crn * 4);
> -                    tcg_gen_andi_i32(cpu_crf[7 - crn], cpu_crf[7 - crn], 0xf);
> +                    tcg_gen_extract_i32(cpu_crf[7 - crn], temp, crn * 4, 4);

Might as well fix indentation here.

Otherwise,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

>               }
>           }
>       }
diff mbox series

Patch

diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 329da4d518..c6e1f7c2ca 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -4802,16 +4802,14 @@  static void gen_mtcrf(DisasContext *ctx)
             TCGv_i32 temp = tcg_temp_new_i32();
             crn = ctz32(crm);
             tcg_gen_trunc_tl_i32(temp, cpu_gpr[rS(ctx->opcode)]);
-            tcg_gen_shri_i32(temp, temp, crn * 4);
-            tcg_gen_andi_i32(cpu_crf[7 - crn], temp, 0xf);
+            tcg_gen_extract_i32(cpu_crf[7 - crn], temp, crn * 4, 4);
         }
     } else {
         TCGv_i32 temp = tcg_temp_new_i32();
         tcg_gen_trunc_tl_i32(temp, cpu_gpr[rS(ctx->opcode)]);
         for (crn = 0 ; crn < 8 ; crn++) {
             if (crm & (1 << crn)) {
-                    tcg_gen_shri_i32(cpu_crf[7 - crn], temp, crn * 4);
-                    tcg_gen_andi_i32(cpu_crf[7 - crn], cpu_crf[7 - crn], 0xf);
+                    tcg_gen_extract_i32(cpu_crf[7 - crn], temp, crn * 4, 4);
             }
         }
     }