[v5,2/2] dt-bindings: dma: HiSilicon: Add bindings for HiSilicon Ascend sdma

Add device-tree binding documentation for sdma hardware on
HiSilicon Ascend SoC families.

Signed-off-by: Guo Mengqi <guomengqi3@huawei.com>
---
 .../bindings/dma/hisilicon,ascend-sdma.yaml   | 73 +++++++++++++++++++
 1 file changed, 73 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/dma/hisilicon,ascend-sdma.yaml

On Sat, Oct 21, 2023 at 05:34:53PM +0800, Guo Mengqi wrote:
> Add device-tree binding documentation for sdma hardware on
> HiSilicon Ascend SoC families.
> 
> Signed-off-by: Guo Mengqi <guomengqi3@huawei.com>
> ---
>  .../bindings/dma/hisilicon,ascend-sdma.yaml   | 73 +++++++++++++++++++
>  1 file changed, 73 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/dma/hisilicon,ascend-sdma.yaml
> 
> diff --git a/Documentation/devicetree/bindings/dma/hisilicon,ascend-sdma.yaml b/Documentation/devicetree/bindings/dma/hisilicon,ascend-sdma.yaml
> new file mode 100644
> index 000000000000..7b452b54fe0c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/hisilicon,ascend-sdma.yaml
> @@ -0,0 +1,73 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dma/hisilicon,ascend-sdma.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: HiSilicon Ascend System DMA (SDMA) controller
> +
> +description: |
> +  The Ascend SDMA controller is used for transferring data
> +  in system memory.
> +
> +maintainers:
> +  - Guo Mengqi <guomengqi3@huawei.com>
> +
> +allOf:
> +  - $ref: dma-controller.yaml#
> +
> +properties:
> +  compatible:
> +    enum:
> +      - hisilicon,ascend310-sdma
> +      - hisilicon,ascend910-sdma
> +
> +  reg:
> +    maxItems: 1
> +
> +  '#dma-cells':
> +    const: 1
> +    description:
> +      Clients specify a single cell with channel number.
> +
> +  dma-channel-mask:
> +    minItems: 1
> +    maxItems: 2
> +
> +  iommus:
> +    maxItems: 1
> +
> +  pasid-num-bits:
> +    description: |
> +      This tells smmu that this device supports iommu-sva feature.

How is this a feature of the DMA controller? Shouldn't this be part of 
the iommu cells? How does pasid relate to SVA?

> +      This determines the maximum number of digits in the pasid.
> +    maximum: 0x10
> +
> +  dma-coherent: true
> +
> +  dma-can-stall: true

What is this?

> +
> +required:
> +  - compatible
> +  - reg
> +  - dma-channel-mask
> +  - '#dma-cells'
> +  - iommus
> +  - pasid-num-bits
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    dma-controller@880e0000 {
> +        compatible = "hisilicon,ascend310-sdma";
> +        reg = <0x880e0000 0x10000>;
> +        dma-channel-mask = <0xff00>;
> +        iommus = <&smmu 0x7f46>;
> +        pasid-num-bits = <0x10>;
> +        dma-coherent;
> +        dma-can-stall;
> +        #dma-cells = <1>;
> +    };
> +
> +...
> -- 
> 2.17.1
>