diff mbox series

arm64: dts: imx8-ss-img: Assign slot for imx jpeg encoder/decoder

Message ID 20230601023801.25229-1-ming.qian@nxp.com
State Superseded
Headers show
Series arm64: dts: imx8-ss-img: Assign slot for imx jpeg encoder/decoder | expand

Commit Message

Ming Qian June 1, 2023, 2:38 a.m. UTC 
assign a single slot,
configure interrupt and power domain only for 1 slot,
not for the all 4 slots.

Signed-off-by: Ming Qian <ming.qian@nxp.com>
---
 .../arm64/boot/dts/freescale/imx8-ss-img.dtsi | 22 +++++--------------
 1 file changed, 6 insertions(+), 16 deletions(-)

Comments

Mirela Rabulea OSS July 11, 2023, 10:55 p.m. UTC | #1 
Hi Ming,

> -----Original Message-----
> From: Ming Qian <ming.qian@nxp.com>
> Sent: Thursday, June 1, 2023 5:38 AM
> To: shawnguo@kernel.org; Mirela Rabulea (OSS) <mirela.rabulea@oss.nxp.com>
> Cc: robh+dt@kernel.org; s.hauer@pengutronix.de; kernel@pengutronix.de; dl-
> linux-imx <linux-imx@nxp.com>; linux-media@vger.kernel.org;
> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-
> kernel@vger.kernel.org
> Subject: [PATCH] arm64: dts: imx8-ss-img: Assign slot for imx jpeg
> encoder/decoder
> 
> assign a single slot,

As I mentioned for the first patch of this series, I don't think it's ok to limit the driver to using just one slot, the slot which is hardcoded in the dts. I suggest to hold off this patch series until we have a more clear picture how we want to change it for imx9.

Regards,
Mirela

> configure interrupt and power domain only for 1 slot, not for the all 4 slots.
> 
> Signed-off-by: Ming Qian <ming.qian@nxp.com>
> ---
>  .../arm64/boot/dts/freescale/imx8-ss-img.dtsi | 22 +++++--------------
>  1 file changed, 6 insertions(+), 16 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
> b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
> index a90654155a88..176dcce24b64 100644
> --- a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
> @@ -18,10 +18,7 @@ img_ipg_clk: clock-img-ipg {
> 
>  	jpegdec: jpegdec@58400000 {
>  		reg = <0x58400000 0x00050000>;
> -		interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
> -			     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
> -			     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
> -			     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>;
>  		clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>,
>  			 <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>;
>  		clock-names = "per", "ipg";
> @@ -29,18 +26,13 @@ jpegdec: jpegdec@58400000 {
>  				  <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>;
>  		assigned-clock-rates = <200000000>, <200000000>;
>  		power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>,
> -				<&pd IMX_SC_R_MJPEG_DEC_S0>,
> -				<&pd IMX_SC_R_MJPEG_DEC_S1>,
> -				<&pd IMX_SC_R_MJPEG_DEC_S2>,
> -				<&pd IMX_SC_R_MJPEG_DEC_S3>;
> +				<&pd IMX_SC_R_MJPEG_DEC_S0>;
> +		slot = <0>;
>  	};
> 
>  	jpegenc: jpegenc@58450000 {
>  		reg = <0x58450000 0x00050000>;
> -		interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
> -			     <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
> -			     <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
> -			     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
>  		clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>,
>  			 <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>;
>  		clock-names = "per", "ipg";
> @@ -48,10 +40,8 @@ jpegenc: jpegenc@58450000 {
>  				  <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>;
>  		assigned-clock-rates = <200000000>, <200000000>;
>  		power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>,
> -				<&pd IMX_SC_R_MJPEG_ENC_S0>,
> -				<&pd IMX_SC_R_MJPEG_ENC_S1>,
> -				<&pd IMX_SC_R_MJPEG_ENC_S2>,
> -				<&pd IMX_SC_R_MJPEG_ENC_S3>;
> +				<&pd IMX_SC_R_MJPEG_ENC_S0>;
> +		slot = <0>;
>  	};
> 
>  	img_jpeg_dec_lpcg: clock-controller@585d0000 {
> --
> 2.38.1
Shawn Guo Sept. 19, 2023, 12:26 p.m. UTC | #2 
On Thu, Jun 01, 2023 at 10:38:01AM +0800, Ming Qian wrote:
> assign a single slot,
> configure interrupt and power domain only for 1 slot,
> not for the all 4 slots.
> 
> Signed-off-by: Ming Qian <ming.qian@nxp.com>
> ---
>  .../arm64/boot/dts/freescale/imx8-ss-img.dtsi | 22 +++++--------------
>  1 file changed, 6 insertions(+), 16 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
> index a90654155a88..176dcce24b64 100644
> --- a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
> @@ -18,10 +18,7 @@ img_ipg_clk: clock-img-ipg {
>  
>  	jpegdec: jpegdec@58400000 {
>  		reg = <0x58400000 0x00050000>;
> -		interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
> -			     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
> -			     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
> -			     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>;
>  		clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>,
>  			 <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>;
>  		clock-names = "per", "ipg";
> @@ -29,18 +26,13 @@ jpegdec: jpegdec@58400000 {
>  				  <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>;
>  		assigned-clock-rates = <200000000>, <200000000>;
>  		power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>,
> -				<&pd IMX_SC_R_MJPEG_DEC_S0>,
> -				<&pd IMX_SC_R_MJPEG_DEC_S1>,
> -				<&pd IMX_SC_R_MJPEG_DEC_S2>,
> -				<&pd IMX_SC_R_MJPEG_DEC_S3>;
> +				<&pd IMX_SC_R_MJPEG_DEC_S0>;
> +		slot = <0>;

I do not find this 'slot' property in bindings doc.

Shawn

>  	};
>  
>  	jpegenc: jpegenc@58450000 {
>  		reg = <0x58450000 0x00050000>;
> -		interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
> -			     <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
> -			     <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
> -			     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
>  		clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>,
>  			 <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>;
>  		clock-names = "per", "ipg";
> @@ -48,10 +40,8 @@ jpegenc: jpegenc@58450000 {
>  				  <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>;
>  		assigned-clock-rates = <200000000>, <200000000>;
>  		power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>,
> -				<&pd IMX_SC_R_MJPEG_ENC_S0>,
> -				<&pd IMX_SC_R_MJPEG_ENC_S1>,
> -				<&pd IMX_SC_R_MJPEG_ENC_S2>,
> -				<&pd IMX_SC_R_MJPEG_ENC_S3>;
> +				<&pd IMX_SC_R_MJPEG_ENC_S0>;
> +		slot = <0>;
>  	};
>  
>  	img_jpeg_dec_lpcg: clock-controller@585d0000 {
> -- 
> 2.38.1
>
Ming Qian Sept. 20, 2023, 2:29 a.m. UTC | #3 
>> assign a single slot,
>> configure interrupt and power domain only for 1 slot, not for the all
>> 4 slots.
>>
>> Signed-off-by: Ming Qian <ming.qian@nxp.com>
>> ---
>>  .../arm64/boot/dts/freescale/imx8-ss-img.dtsi | 22
>> +++++--------------
>>  1 file changed, 6 insertions(+), 16 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
>> b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
>> index a90654155a88..176dcce24b64 100644
>> --- a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
>> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
>> @@ -18,10 +18,7 @@ img_ipg_clk: clock-img-ipg {
>>
>>       jpegdec: jpegdec@58400000 {
>>               reg = <0x58400000 0x00050000>;
>> -             interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
>> -                          <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
>> -                          <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
>> -                          <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
>> +             interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>;
>>               clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>,
>>                        <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>;
>>               clock-names = "per", "ipg"; @@ -29,18 +26,13 @@ jpegdec:
>> jpegdec@58400000 {
>>                                 <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>;
>>               assigned-clock-rates = <200000000>, <200000000>;
>>               power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>,
>> -                             <&pd IMX_SC_R_MJPEG_DEC_S0>,
>> -                             <&pd IMX_SC_R_MJPEG_DEC_S1>,
>> -                             <&pd IMX_SC_R_MJPEG_DEC_S2>,
>> -                             <&pd IMX_SC_R_MJPEG_DEC_S3>;
>> +                             <&pd IMX_SC_R_MJPEG_DEC_S0>;
>> +             slot = <0>;
>
>I do not find this 'slot' property in bindings doc.

I'll add it in v2

>
>Shawn
>
>>       };
>>
>>       jpegenc: jpegenc@58450000 {
>>               reg = <0x58450000 0x00050000>;
>> -             interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
>> -                          <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
>> -                          <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
>> -                          <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
>> +             interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
>>               clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>,
>>                        <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>;
>>               clock-names = "per", "ipg"; @@ -48,10 +40,8 @@ jpegenc:
>> jpegenc@58450000 {
>>                                 <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>;
>>               assigned-clock-rates = <200000000>, <200000000>;
>>               power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>,
>> -                             <&pd IMX_SC_R_MJPEG_ENC_S0>,
>> -                             <&pd IMX_SC_R_MJPEG_ENC_S1>,
>> -                             <&pd IMX_SC_R_MJPEG_ENC_S2>,
>> -                             <&pd IMX_SC_R_MJPEG_ENC_S3>;
>> +                             <&pd IMX_SC_R_MJPEG_ENC_S0>;
>> +             slot = <0>;
>>       };
>>
>>       img_jpeg_dec_lpcg: clock-controller@585d0000 {
>> --
>> 2.38.1
>>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
index a90654155a88..176dcce24b64 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
@@ -18,10 +18,7 @@  img_ipg_clk: clock-img-ipg {
 
 	jpegdec: jpegdec@58400000 {
 		reg = <0x58400000 0x00050000>;
-		interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
+		interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>,
 			 <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>;
 		clock-names = "per", "ipg";
@@ -29,18 +26,13 @@  jpegdec: jpegdec@58400000 {
 				  <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>;
 		assigned-clock-rates = <200000000>, <200000000>;
 		power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>,
-				<&pd IMX_SC_R_MJPEG_DEC_S0>,
-				<&pd IMX_SC_R_MJPEG_DEC_S1>,
-				<&pd IMX_SC_R_MJPEG_DEC_S2>,
-				<&pd IMX_SC_R_MJPEG_DEC_S3>;
+				<&pd IMX_SC_R_MJPEG_DEC_S0>;
+		slot = <0>;
 	};
 
 	jpegenc: jpegenc@58450000 {
 		reg = <0x58450000 0x00050000>;
-		interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
+		interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>,
 			 <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>;
 		clock-names = "per", "ipg";
@@ -48,10 +40,8 @@  jpegenc: jpegenc@58450000 {
 				  <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>;
 		assigned-clock-rates = <200000000>, <200000000>;
 		power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>,
-				<&pd IMX_SC_R_MJPEG_ENC_S0>,
-				<&pd IMX_SC_R_MJPEG_ENC_S1>,
-				<&pd IMX_SC_R_MJPEG_ENC_S2>,
-				<&pd IMX_SC_R_MJPEG_ENC_S3>;
+				<&pd IMX_SC_R_MJPEG_ENC_S0>;
+		slot = <0>;
 	};
 
 	img_jpeg_dec_lpcg: clock-controller@585d0000 {