| Message ID | 20230817094520.21286-8-Huangzheng.Lai@unisoc.com |
|---|---|
| State | New |
| Headers | show |
| Series | [1/8] i2c: sprd: Add configurations that support 1Mhz and 3.4Mhz frequencies | expand |
Hi Huangzheng, On Thu, Aug 17, 2023 at 05:45:19PM +0800, Huangzheng Lai wrote: > We found that when clearing the I2C_TX_ACK bit, the I2C_MODE bit will where is the I2C_TX_ACK bit cleared? > also be cleared to 0. When the IIC master reads data, this situation > will cause the FIFO of the IIC to be empty after clearing the interrupt. Still I am not understanding the situation. In the clear_irq you don't seem to do anything with the TX_ACK. > To address this issue, when clearing interrupts, set I2C_RX_ACK bit to 1, > as writing 1 to this bit will not take effect. writing 1 to which bit? Andi > > Signed-off-by: Huangzheng Lai <Huangzheng.Lai@unisoc.com> > --- > drivers/i2c/busses/i2c-sprd.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/i2c/busses/i2c-sprd.c b/drivers/i2c/busses/i2c-sprd.c > index d867389c7f17..6f65f28ea69d 100644 > --- a/drivers/i2c/busses/i2c-sprd.c > +++ b/drivers/i2c/busses/i2c-sprd.c > @@ -138,7 +138,7 @@ static void sprd_i2c_clear_irq(struct sprd_i2c *i2c_dev) > { > u32 tmp = readl(i2c_dev->base + I2C_STATUS); > > - writel(tmp & ~I2C_INT, i2c_dev->base + I2C_STATUS); > + writel((tmp & ~I2C_INT) | I2C_RX_ACK, i2c_dev->base + I2C_STATUS); > } > > static void sprd_i2c_reset_fifo(struct sprd_i2c *i2c_dev) > -- > 2.17.1 >
diff --git a/drivers/i2c/busses/i2c-sprd.c b/drivers/i2c/busses/i2c-sprd.c index d867389c7f17..6f65f28ea69d 100644 --- a/drivers/i2c/busses/i2c-sprd.c +++ b/drivers/i2c/busses/i2c-sprd.c @@ -138,7 +138,7 @@ static void sprd_i2c_clear_irq(struct sprd_i2c *i2c_dev) { u32 tmp = readl(i2c_dev->base + I2C_STATUS); - writel(tmp & ~I2C_INT, i2c_dev->base + I2C_STATUS); + writel((tmp & ~I2C_INT) | I2C_RX_ACK, i2c_dev->base + I2C_STATUS); } static void sprd_i2c_reset_fifo(struct sprd_i2c *i2c_dev)
We found that when clearing the I2C_TX_ACK bit, the I2C_MODE bit will also be cleared to 0. When the IIC master reads data, this situation will cause the FIFO of the IIC to be empty after clearing the interrupt. To address this issue, when clearing interrupts, set I2C_RX_ACK bit to 1, as writing 1 to this bit will not take effect. Signed-off-by: Huangzheng Lai <Huangzheng.Lai@unisoc.com> --- drivers/i2c/busses/i2c-sprd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)