| Message ID | 20230830-fp5-initial-v1-0-5a954519bbad@fairphone.com |
|---|---|
| Headers | show |
| Series | Initial support for the Fairphone 5 smartphone | expand |
On 30/08/2023 11:58, Luca Weiss wrote: > On some platforms like sc7280 on non-ChromeOS devices the core clock > cannot be touched by Linux so we cannot provide it. Mark it as optional > as accessing qfprom works without it. > > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> > --- > drivers/nvmem/qfprom.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) This should not be between DTS patches. DTS goes different tree than other driver changes. Please split your patchset and do not mix drivers and DTS. Best regards, Krzysztof
On 30/08/2023 11:58, Luca Weiss wrote: > Fairphone 5 is a smartphone based on the QCM6490 SoC. > > Also allow qcom,board-id and qcom,msm-id for QCM6490 since it's required > by the bootloader. > > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> > --- > Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml > index adbfaea32343..b09a41812cf0 100644 > --- a/Documentation/devicetree/bindings/arm/qcom.yaml > +++ b/Documentation/devicetree/bindings/arm/qcom.yaml > @@ -391,6 +391,11 @@ properties: > - const: qcom,qrb2210 > - const: qcom,qcm2290 > > + - items: > + - enum: > + - fairphone,fp5 > + - const: qcom,qcm6490 You miss update to first list of SoCs for bootloader. > + > - description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform > items: > - enum: > @@ -1074,6 +1079,7 @@ allOf: > - qcom,msm8994 > - qcom,msm8996 > - qcom,msm8998 > + - qcom,qcm6490 This is not a legacy SoC (released in 2022). Not allowed. Best regards, Krzysztof
On Wed Aug 30, 2023 at 12:08 PM CEST, Konrad Dybcio wrote: > On 30.08.2023 11:58, Luca Weiss wrote: > > With the standard Qualcomm TrustZone setup, components such as lpasscc, > > pdc_reset and watchdog shouldn't be touched by Linux. Mark them with > > the status 'reserved' and reeable them in the chrome-common dtsi. > > > > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> > > --- > Could probably use /* Owned by ADSP firmware */ or /* Owned by Gunyah hyp */ Do you know which one is more fitting for these nodes? I don't really have a reference to if the ADSP or Gunyah (is this even used here?) owns this. Regards Luca > > the change lgtm though > > Konrad
On 30.08.2023 12:35, Luca Weiss wrote: > On Wed Aug 30, 2023 at 12:08 PM CEST, Konrad Dybcio wrote: >> On 30.08.2023 11:58, Luca Weiss wrote: >>> With the standard Qualcomm TrustZone setup, components such as lpasscc, >>> pdc_reset and watchdog shouldn't be touched by Linux. Mark them with >>> the status 'reserved' and reeable them in the chrome-common dtsi. >>> >>> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> >>> --- >> Could probably use /* Owned by ADSP firmware */ or /* Owned by Gunyah hyp */ > > Do you know which one is more fitting for these nodes? I don't really > have a reference to if the ADSP or Gunyah (is this even used here?) owns > this. ADSP owns the audio hw, Gunyah owns the wdog Konrad
On 30-08-23, 11:58, Luca Weiss wrote: > The Qualcomm QCM6490 platform uses the qcom-cpufreq-hw driver, so add it > to the cpufreq-dt-platdev driver's blocklist. > > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> > --- > drivers/cpufreq/cpufreq-dt-platdev.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c > index fb2875ce1fdd..02ec58a8603b 100644 > --- a/drivers/cpufreq/cpufreq-dt-platdev.c > +++ b/drivers/cpufreq/cpufreq-dt-platdev.c > @@ -145,6 +145,7 @@ static const struct of_device_id blocklist[] __initconst = { > { .compatible = "qcom,msm8996", }, > { .compatible = "qcom,msm8998", }, > { .compatible = "qcom,qcm2290", }, > + { .compatible = "qcom,qcm6490", }, > { .compatible = "qcom,qcs404", }, > { .compatible = "qcom,qdu1000", }, > { .compatible = "qcom,sa8155p" }, Applied. Thanks.
On Wed Aug 30, 2023 at 12:09 PM CEST, Konrad Dybcio wrote: > On 30.08.2023 11:58, Luca Weiss wrote: > > On non-ChromeOS boards the clock cannot be touched, so move it in the > > chrome-common dtsi which is the only place where it's needed. > > > > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> > > --- > If that clock is not registered (e.g. it's in protected-clocks = <>, > would the _optional handler not handle it just fine? Right, that appears to work! ~ # ls -d /sys/bus/platform/drivers/qcom,qfprom/*.efuse /sys/bus/platform/drivers/qcom,qfprom/784000.efuse ~ # cat /sys/firmware/devicetree/base/soc@0/efuse@784000/clock-names; echo core ~ # hexdump -C /sys/firmware/devicetree/base/soc@0/efuse@784000/clocks 00000000 00 00 00 03 00 00 00 b8 |........| 00000008 Never tested this case before, but since it appears to work with the patched qfprom driver (other patch in this series) I think we can drop this patch. Will also have to adjust some other patches in my local tree then that do similar things ;) Regards Luca > > Konrad
On Wed, 30 Aug 2023 11:58:25 +0200, Luca Weiss wrote: > Add support to boot up mainline kernel on the QCM6490-based Fairphone 5 > smartphone. > > These patches only cover a part of the functionality brought up on > mainline so far, with the rest needing larger dts and driver changes or > depend on patches that are not yet merged. I will work on sending those > once these base patches here have settled. > > [...] Applied, thanks! [07/11] dt-bindings: arm: qcom,ids: Add SoC ID for QCM6490 commit: ccfb4d8b606302d857a03ea29039e21029311335 [08/11] soc: qcom: socinfo: Add SoC ID for QCM6490 commit: 59872d59d164ec67f295d6f96fe818b92973ee40 Best regards,
Add support to boot up mainline kernel on the QCM6490-based Fairphone 5 smartphone. These patches only cover a part of the functionality brought up on mainline so far, with the rest needing larger dts and driver changes or depend on patches that are not yet merged. I will work on sending those once these base patches here have settled. Since QCM6490, like SC7280 are 'yupik' in the vendor-provided kernel, we can base the dts on it and leverage existing support. Though current sc7280 support mostly assumes ChromeOS devices which have a different TrustZone setup, so we need to move some ChromeOS-specific bits to the sc7280-chrome-common.dtsi file to make it boot on a standard TZ board. Depends on (just for the #include in sc7280.dtsi): https://lore.kernel.org/linux-arm-msm/20230818-qcom-vmid-defines-v1-1-45b610c96b13@fairphone.com/ The pm7250b patch has been picked up from this series: https://lore.kernel.org/linux-arm-msm/20230407-pm7250b-sid-v1-2-fc648478cc25@fairphone.com/ Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> --- Luca Weiss (11): arm64: dts: qcom: sc7280: Mark some nodes as 'reserved' nvmem: qfprom: Mark core clk as optional arm64: dts: qcom: sc7280: Move qfprom clock to chrome-common arm64: dts: qcom: pm7250b: make SID configurable arm64: dts: qcom: pm8350c: Add flash led node dt-bindings: pinctrl: qcom,sc7280: Allow gpio-reserved-ranges dt-bindings: arm: qcom,ids: Add SoC ID for QCM6490 soc: qcom: socinfo: Add SoC ID for QCM6490 cpufreq: Add QCM6490 to cpufreq-dt-platdev blocklist dt-bindings: arm: qcom: Add QCM6490 Fairphone 5 arm64: dts: qcom: qcm6490: Add device-tree for Fairphone 5 Documentation/devicetree/bindings/arm/qcom.yaml | 6 + .../bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 4 + arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/pm7250b.dtsi | 23 +- arch/arm64/boot/dts/qcom/pm8350c.dtsi | 6 + arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts | 659 +++++++++++++++++++++ arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi | 17 + arch/arm64/boot/dts/qcom/sc7280.dtsi | 7 +- drivers/cpufreq/cpufreq-dt-platdev.c | 1 + drivers/nvmem/qfprom.c | 2 +- drivers/soc/qcom/socinfo.c | 1 + include/dt-bindings/arm/qcom,ids.h | 1 + 12 files changed, 717 insertions(+), 11 deletions(-) --- base-commit: 0255bba921438ea1e45d3f0873c3e8c5a1e03876 change-id: 20230818-fp5-initial-b6c8210ba9c8 Best regards,