diff mbox series

[v8,4/6] soc: qcom: Add LLCC support for multi channel DDR

Message ID 20230830105654.28057-5-quic_kbajaj@quicinc.com
State Accepted
Commit a78502a4b2201235d93b04ac2902e01e32588bd5
Headers show
Series soc: qcom: llcc: Add support for QDU1000/QRU1000 | expand

Commit Message

Komal Bajaj Aug. 30, 2023, 10:56 a.m. UTC
Add LLCC support for multi channel DDR configuration
based on a feature register.

Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
---
 drivers/soc/qcom/llcc-qcom.c | 25 ++++++++++++++++++++++++-
 1 file changed, 24 insertions(+), 1 deletion(-)

--
2.41.0

Comments

Konrad Dybcio Aug. 30, 2023, 12:32 p.m. UTC | #1
On 30.08.2023 12:56, Komal Bajaj wrote:
> Add LLCC support for multi channel DDR configuration
> based on a feature register.
> 
> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
> ---
[...]

global pointer to a error code to avoid referencing it */
> @@ -1031,6 +1050,7 @@ static int qcom_llcc_probe(struct platform_device *pdev)
>  	const struct qcom_llcc_config *cfg;
>  	const struct llcc_slice_config *llcc_cfg;
>  	u32 sz;
> +	u8 cfg_index;
>  	u32 version;
>  	struct regmap *regmap;
> 
> @@ -1052,7 +1072,10 @@ static int qcom_llcc_probe(struct platform_device *pdev)
>  		ret = -EINVAL;
>  		goto err;
>  	}
> -	cfg = &cfgs->llcc_config[0];
This is unnecessary, get_cfg_index returns 0 when no nvmem cell is
present.

Konrad
Mukesh Ojha Aug. 31, 2023, 1:46 p.m. UTC | #2
On 8/30/2023 4:26 PM, Komal Bajaj wrote:
> Add LLCC support for multi channel DDR configuration
> based on a feature register.
> 
> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>

LGTM, thanks for the regular follow up on this.

Reviewed-by : Mukesh Ojha <quic_mojha@quicinc.com>

-Mukesh

> ---
>   drivers/soc/qcom/llcc-qcom.c | 25 ++++++++++++++++++++++++-
>   1 file changed, 24 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
> index cbef8d825361..c31d9e39e864 100644
> --- a/drivers/soc/qcom/llcc-qcom.c
> +++ b/drivers/soc/qcom/llcc-qcom.c
> @@ -12,6 +12,7 @@
>   #include <linux/kernel.h>
>   #include <linux/module.h>
>   #include <linux/mutex.h>
> +#include <linux/nvmem-consumer.h>
>   #include <linux/of.h>
>   #include <linux/regmap.h>
>   #include <linux/sizes.h>
> @@ -995,6 +996,24 @@ static int qcom_llcc_cfg_program(struct platform_device *pdev,
>   	return ret;
>   }
> 
> +static int qcom_llcc_get_cfg_index(struct platform_device *pdev, u8 *cfg_index, int num_config)
> +{
> +	int ret;
> +
> +	ret = nvmem_cell_read_u8(&pdev->dev, "multi-chan-ddr", cfg_index);
> +	if (ret == -ENOENT || ret == -EOPNOTSUPP) {
> +		if (num_config > 1)
> +			return -EINVAL;
> +		*cfg_index = 0;
> +		return 0;
> +	}
> +
> +	if (!ret && *cfg_index >= num_config)
> +		ret = -EINVAL;
> +
> +	return ret;
> +}
> +
>   static int qcom_llcc_remove(struct platform_device *pdev)
>   {
>   	/* Set the global pointer to a error code to avoid referencing it */
> @@ -1031,6 +1050,7 @@ static int qcom_llcc_probe(struct platform_device *pdev)
>   	const struct qcom_llcc_config *cfg;
>   	const struct llcc_slice_config *llcc_cfg;
>   	u32 sz;
> +	u8 cfg_index;
>   	u32 version;
>   	struct regmap *regmap;
> 
> @@ -1052,7 +1072,10 @@ static int qcom_llcc_probe(struct platform_device *pdev)
>   		ret = -EINVAL;
>   		goto err;
>   	}
> -	cfg = &cfgs->llcc_config[0];
> +	ret = qcom_llcc_get_cfg_index(pdev, &cfg_index, cfgs->num_config);
> +	if (ret)
> +		goto err;
> +	cfg = &cfgs->llcc_config[cfg_index];
> 
>   	ret = regmap_read(regmap, cfg->reg_offset[LLCC_COMMON_STATUS0], &num_banks);
>   	if (ret)
> --
> 2.41.0
>
diff mbox series

Patch

diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
index cbef8d825361..c31d9e39e864 100644
--- a/drivers/soc/qcom/llcc-qcom.c
+++ b/drivers/soc/qcom/llcc-qcom.c
@@ -12,6 +12,7 @@ 
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/mutex.h>
+#include <linux/nvmem-consumer.h>
 #include <linux/of.h>
 #include <linux/regmap.h>
 #include <linux/sizes.h>
@@ -995,6 +996,24 @@  static int qcom_llcc_cfg_program(struct platform_device *pdev,
 	return ret;
 }

+static int qcom_llcc_get_cfg_index(struct platform_device *pdev, u8 *cfg_index, int num_config)
+{
+	int ret;
+
+	ret = nvmem_cell_read_u8(&pdev->dev, "multi-chan-ddr", cfg_index);
+	if (ret == -ENOENT || ret == -EOPNOTSUPP) {
+		if (num_config > 1)
+			return -EINVAL;
+		*cfg_index = 0;
+		return 0;
+	}
+
+	if (!ret && *cfg_index >= num_config)
+		ret = -EINVAL;
+
+	return ret;
+}
+
 static int qcom_llcc_remove(struct platform_device *pdev)
 {
 	/* Set the global pointer to a error code to avoid referencing it */
@@ -1031,6 +1050,7 @@  static int qcom_llcc_probe(struct platform_device *pdev)
 	const struct qcom_llcc_config *cfg;
 	const struct llcc_slice_config *llcc_cfg;
 	u32 sz;
+	u8 cfg_index;
 	u32 version;
 	struct regmap *regmap;

@@ -1052,7 +1072,10 @@  static int qcom_llcc_probe(struct platform_device *pdev)
 		ret = -EINVAL;
 		goto err;
 	}
-	cfg = &cfgs->llcc_config[0];
+	ret = qcom_llcc_get_cfg_index(pdev, &cfg_index, cfgs->num_config);
+	if (ret)
+		goto err;
+	cfg = &cfgs->llcc_config[cfg_index];

 	ret = regmap_read(regmap, cfg->reg_offset[LLCC_COMMON_STATUS0], &num_banks);
 	if (ret)