Message ID | 20230827132525.951475-1-dmitry.baryshkov@linaro.org |
---|---|
Headers | show |
Series | ARM: dts: qcom: cleanup PMIC usage | expand |
On 27.08.2023 15:25, Dmitry Baryshkov wrote: > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- "eeh" to not have a commit message at all.. Could at least say something about vendor prefixes being forbidden in node names to explain the rationale. Konrad
On 27.08.2023 15:25, Dmitry Baryshkov wrote: > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- Same as p36 Konrad
On 27.08.2023 15:25, Dmitry Baryshkov wrote: > The interrupt of SSBI PMICs is routed to the SoCs GPIO. As such, it is > not a property of the SoC, it is a property of the particular board > (even if it is standard and unified between all devices). Move these > interrupt specifications to the board files. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > arch/arm/boot/dts/qcom/qcom-apq8060-dragonboard.dts | 4 ++++ > arch/arm/boot/dts/qcom/qcom-msm8660-surf.dts | 4 ++++ > arch/arm/boot/dts/qcom/qcom-msm8660.dtsi | 2 -- > 3 files changed, 8 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/boot/dts/qcom/qcom-apq8060-dragonboard.dts b/arch/arm/boot/dts/qcom/qcom-apq8060-dragonboard.dts > index 48fd1a1feea3..e4261d729d35 100644 > --- a/arch/arm/boot/dts/qcom/qcom-apq8060-dragonboard.dts > +++ b/arch/arm/boot/dts/qcom/qcom-apq8060-dragonboard.dts > @@ -273,6 +273,10 @@ kxsd9@18 { > }; > }; > > +&pm8058 { > + interrupts-extended = <&tlmm 88 IRQ_TYPE_LEVEL_LOW>; > +}; > + > &pm8058_gpio { > dragon_ethernet_gpios: ethernet-state { > pinconf { > diff --git a/arch/arm/boot/dts/qcom/qcom-msm8660-surf.dts b/arch/arm/boot/dts/qcom/qcom-msm8660-surf.dts > index 86fbb6dfdc2a..a5441aecd637 100644 > --- a/arch/arm/boot/dts/qcom/qcom-msm8660-surf.dts > +++ b/arch/arm/boot/dts/qcom/qcom-msm8660-surf.dts > @@ -34,6 +34,10 @@ &gsbi12_serial { > status = "okay"; > }; > > +&pm8058 { > + interrupts-extended = <&tlmm 88 IRQ_TYPE_LEVEL_LOW>; > +}; > + > &pm8058_keypad { > linux,keymap = < > MATRIX_KEY(0, 0, KEY_FN_F1) > diff --git a/arch/arm/boot/dts/qcom/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8660.dtsi > index 9217ced108c4..84b0366792d4 100644 > --- a/arch/arm/boot/dts/qcom/qcom-msm8660.dtsi > +++ b/arch/arm/boot/dts/qcom/qcom-msm8660.dtsi > @@ -341,8 +341,6 @@ ssbi@500000 { > > pm8058: pmic { > compatible = "qcom,pm8058"; > - interrupt-parent = <&tlmm>; > - interrupts = <88 8>; > #interrupt-cells = <2>; > interrupt-controller; > #address-cells = <1>;
On 27.08.2023 15:25, Dmitry Baryshkov wrote: > The interrupt of SSBI PMICs is routed to the SoCs GPIO. As such, it is > not a property of the SoC, it is a property of the particular board > (even if it is standard and unified between all devices). Move these > interrupt specifications to the board files. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad