| Message ID | 20230822001349.899298-17-dmitry.baryshkov@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | ARM: dts: qcom: cleanup PMIC usage | expand |
On 22.08.2023 02:13, Dmitry Baryshkov wrote: > The PMIC is not a part of the SoC, so move PMIC to a separate file and > include it from the board files. > > Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> > Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- [...] > + pmic { Are you leaving an empty subnode here? Konrad
On Sat, 26 Aug 2023 at 15:08, Konrad Dybcio <konrad.dybcio@linaro.org> wrote: > > On 22.08.2023 02:13, Dmitry Baryshkov wrote: > > The PMIC is not a part of the SoC, so move PMIC to a separate file and > > include it from the board files. > > > > Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> > > Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > > --- > [...] > > > + pmic { > Are you leaving an empty subnode here? No. It contains 'interrupts' property (which is specific to the SoC).
On 26.08.2023 15:43, Dmitry Baryshkov wrote: > On Sat, 26 Aug 2023 at 15:08, Konrad Dybcio <konrad.dybcio@linaro.org> wrote: >> >> On 22.08.2023 02:13, Dmitry Baryshkov wrote: >>> The PMIC is not a part of the SoC, so move PMIC to a separate file and >>> include it from the board files. >>> >>> Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> >>> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> >>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> >>> --- >> [...] >> >>> + pmic { >> Are you leaving an empty subnode here? > > No. It contains 'interrupts' property (which is specific to the SoC). Meh, that's bad design.. should have been in the controller node! But noboyd thought about this 10y+ ago so here we are Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
On Sat, 26 Aug 2023 at 16:48, Konrad Dybcio <konrad.dybcio@linaro.org> wrote: > > On 26.08.2023 15:43, Dmitry Baryshkov wrote: > > On Sat, 26 Aug 2023 at 15:08, Konrad Dybcio <konrad.dybcio@linaro.org> wrote: > >> > >> On 22.08.2023 02:13, Dmitry Baryshkov wrote: > >>> The PMIC is not a part of the SoC, so move PMIC to a separate file and > >>> include it from the board files. > >>> > >>> Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> > >>> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> > >>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > >>> --- > >> [...] > >> > >>> + pmic { > >> Are you leaving an empty subnode here? > > > > No. It contains 'interrupts' property (which is specific to the SoC). > Meh, that's bad design.. should have been in the controller node! It will not be logical either. The interrupt line comes from the PMIC. Wait. Maybe we should do it other way around: move IRQ to the _board_ file, since it is just a GPIO line. Then we don't have to leave this band-aid in place. > But noboyd thought about this 10y+ ago so here we are > > Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> > > Konrad
diff --git a/arch/arm/boot/dts/qcom/pm8018.dtsi b/arch/arm/boot/dts/qcom/pm8018.dtsi new file mode 100644 index 000000000000..c602544900b2 --- /dev/null +++ b/arch/arm/boot/dts/qcom/pm8018.dtsi @@ -0,0 +1,57 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Device Tree Source for Qualcomm PM8018 + * + * Copyright (C) 2016 BayLibre, SAS. + * Author : Neil Armstrong <narmstrong@baylibre.com> + */ + +&ssbi { + pm8018: pmic { + compatible = "qcom,pm8018", "qcom,pm8921"; + #interrupt-cells = <2>; + interrupt-controller; + #address-cells = <1>; + #size-cells = <0>; + + pwrkey@1c { + compatible = "qcom,pm8018-pwrkey", + "qcom,pm8921-pwrkey"; + reg = <0x1c>; + interrupt-parent = <&pm8018>; + interrupts = <50 IRQ_TYPE_EDGE_RISING>, + <51 IRQ_TYPE_EDGE_RISING>; + debounce = <15625>; + pull-up; + }; + + pm8018_mpps: mpps@50 { + compatible = "qcom,pm8018-mpp", "qcom,ssbi-mpp"; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x50>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pm8018_mpps 0 0 6>; + }; + + rtc@11d { + compatible = "qcom,pm8018-rtc", "qcom,pm8921-rtc"; + interrupt-parent = <&pm8018>; + interrupts = <39 IRQ_TYPE_EDGE_RISING>; + reg = <0x11d>; + allow-set-time; + }; + + pm8018_gpio: gpio@150 { + compatible = "qcom,pm8058-gpio", + "qcom,ssbi-gpio"; + reg = <0x150>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + gpio-ranges = <&pm8018_gpio 0 0 6>; + #gpio-cells = <2>; + }; + }; +}; diff --git a/arch/arm/boot/dts/qcom/qcom-mdm9615-wp8548.dtsi b/arch/arm/boot/dts/qcom/qcom-mdm9615-wp8548.dtsi index dac3aa793f71..cc264861afe5 100644 --- a/arch/arm/boot/dts/qcom/qcom-mdm9615-wp8548.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-mdm9615-wp8548.dtsi @@ -7,6 +7,7 @@ */ #include "qcom-mdm9615.dtsi" +#include "pm8018.dtsi" / { model = "Sierra Wireless WP8548 Module"; diff --git a/arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi index c4cfbdbcdf14..11e5ab2708d7 100644 --- a/arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi @@ -258,56 +258,13 @@ gsbi5_serial: serial@16440000 { }; }; - qcom,ssbi@500000 { + ssbi: qcom,ssbi@500000 { compatible = "qcom,ssbi"; reg = <0x500000 0x1000>; qcom,controller-type = "pmic-arbiter"; - pm8018: pmic { - compatible = "qcom,pm8018", "qcom,pm8921"; + pmic { interrupts = <GIC_PPI 226 IRQ_TYPE_LEVEL_HIGH>; - #interrupt-cells = <2>; - interrupt-controller; - #address-cells = <1>; - #size-cells = <0>; - - pwrkey@1c { - compatible = "qcom,pm8018-pwrkey", "qcom,pm8921-pwrkey"; - reg = <0x1c>; - interrupt-parent = <&pm8018>; - interrupts = <50 IRQ_TYPE_EDGE_RISING>, - <51 IRQ_TYPE_EDGE_RISING>; - debounce = <15625>; - pull-up; - }; - - pm8018_mpps: mpps@50 { - compatible = "qcom,pm8018-mpp", "qcom,ssbi-mpp"; - interrupt-controller; - #interrupt-cells = <2>; - reg = <0x50>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pm8018_mpps 0 0 6>; - }; - - rtc@11d { - compatible = "qcom,pm8018-rtc", "qcom,pm8921-rtc"; - interrupt-parent = <&pm8018>; - interrupts = <39 IRQ_TYPE_EDGE_RISING>; - reg = <0x11d>; - allow-set-time; - }; - - pm8018_gpio: gpio@150 { - compatible = "qcom,pm8018-gpio", "qcom,ssbi-gpio"; - reg = <0x150>; - interrupt-controller; - #interrupt-cells = <2>; - gpio-controller; - gpio-ranges = <&pm8018_gpio 0 0 6>; - #gpio-cells = <2>; - }; }; };