| Message ID | 20230818172016.24504-2-philmd@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | target/loongarch: Cleanups in preparation of loongarch32 support | expand |
在 2023/8/19 上午1:20, Philippe Mathieu-Daudé 写道: > Various CSR registers have Read/Write fields. We might > want to see guest trying to change such registers. > > Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> > --- > target/loongarch/cpu.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c > index ad93ecac92..7107968699 100644 > --- a/target/loongarch/cpu.c > +++ b/target/loongarch/cpu.c > @@ -544,6 +544,8 @@ static void loongarch_cpu_realizefn(DeviceState *dev, Error **errp) > static void loongarch_qemu_write(void *opaque, hwaddr addr, > uint64_t val, unsigned size) > { > + qemu_log_mask(LOG_UNIMP, "[%s]: Unimplemented reg 0x%" HWADDR_PRIx "\n", > + __func__, addr); > } > > static uint64_t loongarch_qemu_read(void *opaque, hwaddr addr, unsigned size) > Reviewed-by: Song Gao <gaosong@loongson.cn> Thanks. Song Gao
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index ad93ecac92..7107968699 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -544,6 +544,8 @@ static void loongarch_cpu_realizefn(DeviceState *dev, Error **errp) static void loongarch_qemu_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) { + qemu_log_mask(LOG_UNIMP, "[%s]: Unimplemented reg 0x%" HWADDR_PRIx "\n", + __func__, addr); } static uint64_t loongarch_qemu_read(void *opaque, hwaddr addr, unsigned size)
Various CSR registers have Read/Write fields. We might want to see guest trying to change such registers. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- target/loongarch/cpu.c | 2 ++ 1 file changed, 2 insertions(+)