| Message ID | 20230808031143.50925-9-richard.henderson@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | tcg: Introduce negsetcond opcodes | expand |
On Tue, 8 Aug 2023 at 04:14, Richard Henderson <richard.henderson@linaro.org> wrote: > > The setcond + neg + or sequence is a complex method of > performing a conditional move. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/sparc/translate.c | 17 ++++------------- > 1 file changed, 4 insertions(+), 13 deletions(-) > > diff --git a/target/sparc/translate.c b/target/sparc/translate.c > index bd877a5e4a..fa80a91161 100644 > --- a/target/sparc/translate.c > +++ b/target/sparc/translate.c > @@ -2916,7 +2916,7 @@ static void gen_edge(DisasContext *dc, TCGv dst, TCGv s1, TCGv s2, > > tcg_gen_shr_tl(lo1, tcg_constant_tl(tabl), lo1); > tcg_gen_shr_tl(lo2, tcg_constant_tl(tabr), lo2); > - tcg_gen_andi_tl(dst, lo1, omask); > + tcg_gen_andi_tl(lo1, lo1, omask); > tcg_gen_andi_tl(lo2, lo2, omask); > > amask = -8; > @@ -2926,18 +2926,9 @@ static void gen_edge(DisasContext *dc, TCGv dst, TCGv s1, TCGv s2, > tcg_gen_andi_tl(s1, s1, amask); > tcg_gen_andi_tl(s2, s2, amask); > > - /* We want to compute > - dst = (s1 == s2 ? lo1 : lo1 & lo2). > - We've already done dst = lo1, so this reduces to > - dst &= (s1 == s2 ? -1 : lo2) > - Which we perform by > - lo2 |= -(s1 == s2) > - dst &= lo2 > - */ > - tcg_gen_setcond_tl(TCG_COND_EQ, lo1, s1, s2); > - tcg_gen_neg_tl(lo1, lo1); > - tcg_gen_or_tl(lo2, lo2, lo1); > - tcg_gen_and_tl(dst, dst, lo2); > + /* Compute dst = (s1 == s2 ? lo1 : lo1 & lo2). */ > + tcg_gen_and_tl(lo2, lo2, lo1); > + tcg_gen_movcond_tl(TCG_COND_EQ, dst, s1, s2, lo1, lo2); > } I'm glad I didn't have to figure out exactly what this exciting instruction actually does to review this :-) Reviewed-by: Peter Maydell <peter.maydell@linaro.org> thanks -- PMM
diff --git a/target/sparc/translate.c b/target/sparc/translate.c index bd877a5e4a..fa80a91161 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -2916,7 +2916,7 @@ static void gen_edge(DisasContext *dc, TCGv dst, TCGv s1, TCGv s2, tcg_gen_shr_tl(lo1, tcg_constant_tl(tabl), lo1); tcg_gen_shr_tl(lo2, tcg_constant_tl(tabr), lo2); - tcg_gen_andi_tl(dst, lo1, omask); + tcg_gen_andi_tl(lo1, lo1, omask); tcg_gen_andi_tl(lo2, lo2, omask); amask = -8; @@ -2926,18 +2926,9 @@ static void gen_edge(DisasContext *dc, TCGv dst, TCGv s1, TCGv s2, tcg_gen_andi_tl(s1, s1, amask); tcg_gen_andi_tl(s2, s2, amask); - /* We want to compute - dst = (s1 == s2 ? lo1 : lo1 & lo2). - We've already done dst = lo1, so this reduces to - dst &= (s1 == s2 ? -1 : lo2) - Which we perform by - lo2 |= -(s1 == s2) - dst &= lo2 - */ - tcg_gen_setcond_tl(TCG_COND_EQ, lo1, s1, s2); - tcg_gen_neg_tl(lo1, lo1); - tcg_gen_or_tl(lo2, lo2, lo1); - tcg_gen_and_tl(dst, dst, lo2); + /* Compute dst = (s1 == s2 ? lo1 : lo1 & lo2). */ + tcg_gen_and_tl(lo2, lo2, lo1); + tcg_gen_movcond_tl(TCG_COND_EQ, dst, s1, s2, lo1, lo2); } static void gen_alignaddr(TCGv dst, TCGv s1, TCGv s2, bool left)
The setcond + neg + or sequence is a complex method of performing a conditional move. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/sparc/translate.c | 17 ++++------------- 1 file changed, 4 insertions(+), 13 deletions(-)