mbox series

[v5,0/6] soc: qcom: llcc: Add support for QDU1000/QRU1000

Message ID 20230724084155.8682-1-quic_kbajaj@quicinc.com
Headers show
Series soc: qcom: llcc: Add support for QDU1000/QRU1000 | expand

Message

Komal Bajaj July 24, 2023, 8:41 a.m. UTC
This patch series does the following -
 * Refactor LLCC driver to support multiple configuration
 * Add stub function for nvmem_cell_read_u8
 * Add support for multi channel DDR configuration in LLCC
 * Add LLCC support for the Qualcomm QDU1000 and QRU1000 SoCs

Changes in v5 -
 - Seperated out the secure qfprom driver changes to a separate series [1].
 - Created a wrapper struct with a pointer to qcom_llcc_config and
   length of array qcom_llcc_config.
 - Added stub function for nvmem_cell_read_u8.
 - Split commit 6/6 in the previous series into two commits.

Changes in v4 -
 - Created a separate driver for reading from secure fuse region as suggested.
 - Added patch for dt-bindings of secure qfprom driver accordingly.
 - Added new properties in the dt-bindings for LLCC. 
 - Implemented new logic to read the nvmem cell as suggested by Bjorn.
 - Separating the DT patches from this series as per suggestion.

Changes in v3-
 - Addressed comments from Krzysztof and Mani.
 - Using qfprom to read DDR configuration from feature register.

Changes in v2:
  - Addressing comments from Konrad.

[1] https://lore.kernel.org/linux-arm-msm/20230724082946.7441-1-quic_kbajaj@quicinc.com/

Komal Bajaj (6):
  dt-bindings: cache: qcom,llcc: Add LLCC compatible for QDU1000/QRU1000
  soc: qcom: llcc: Refactor llcc driver to support multiple
    configuration
  nvmem: core: Add stub for nvmem_cell_read_u8
  soc: qcom: Add LLCC support for multi channel DDR
  soc: qcom: llcc: Updating the macro name
  soc: qcom: llcc: Add QDU1000 and QRU1000 LLCC support

 .../devicetree/bindings/cache/qcom,llcc.yaml  |  10 +
 drivers/soc/qcom/llcc-qcom.c                  | 357 +++++++++++++-----
 include/linux/nvmem-consumer.h                |   6 +
 include/linux/soc/qcom/llcc-qcom.h            |   2 +-
 4 files changed, 287 insertions(+), 88 deletions(-)

Comments

Komal Bajaj Aug. 2, 2023, 8:55 a.m. UTC | #1
On 7/24/2023 6:18 PM, Konrad Dybcio wrote:
> On 24.07.2023 10:41, Komal Bajaj wrote:
>> Updating macro name for LLCC_DRE to LLCC_ECC as per
>> the latest specification.
>>
>> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
>> ---
> Nit: "updating" -> "update", as the action is complete.
>
> On top of that, please wrap your commit messages at +/- 72 characters,
> not 50.

Sure, will update the commit message.

Thanks
Komal

>
> Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>
> Konrad
>>   drivers/soc/qcom/llcc-qcom.c       | 2 +-
>>   include/linux/soc/qcom/llcc-qcom.h | 2 +-
>>   2 files changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
>> index 1d2b08dfecea..228ffb4a8971 100644
>> --- a/drivers/soc/qcom/llcc-qcom.c
>> +++ b/drivers/soc/qcom/llcc-qcom.c
>> @@ -193,7 +193,7 @@ static const struct llcc_slice_config sc8280xp_data[] = {
>>   	{ LLCC_MMUHWT,   13, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
>>   	{ LLCC_DISP,     16, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
>>   	{ LLCC_AUDHW,    22, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
>> -	{ LLCC_DRE,      26, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
>> +	{ LLCC_ECC,      26, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
>>   	{ LLCC_CVP,      28, 512,  3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
>>   	{ LLCC_APTCM,    30, 1024, 3, 1, 0x0,   0x1, 1, 0, 0, 1, 0, 0 },
>>   	{ LLCC_WRCACHE,  31, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
>> diff --git a/include/linux/soc/qcom/llcc-qcom.h b/include/linux/soc/qcom/llcc-qcom.h
>> index 93417ba1ead4..1a886666bbb6 100644
>> --- a/include/linux/soc/qcom/llcc-qcom.h
>> +++ b/include/linux/soc/qcom/llcc-qcom.h
>> @@ -30,7 +30,7 @@
>>   #define LLCC_NPU         23
>>   #define LLCC_WLHW        24
>>   #define LLCC_PIMEM       25
>> -#define LLCC_DRE         26
>> +#define LLCC_ECC         26
>>   #define LLCC_CVP         28
>>   #define LLCC_MODPE       29
>>   #define LLCC_APTCM       30
Komal Bajaj Aug. 2, 2023, 9 a.m. UTC | #2
On 7/24/2023 6:25 PM, Konrad Dybcio wrote:
> On 24.07.2023 14:45, Mukesh Ojha wrote:
>>
>> On 7/24/2023 2:11 PM, Komal Bajaj wrote:
>>> Add LLCC configuration data for QDU1000 and QRU1000 SoCs.
>>>
>>> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
>>> ---
> [...]
>
>>>    static const struct qcom_sct_config sc7180_cfgs = {
>>>        .llcc_config    = sc7180_cfg,
>>>        .num_cfgs    = 1,
>>> @@ -611,6 +672,11 @@ static const struct qcom_sct_config sm8550_cfgs = {
>>>        .num_cfgs    = 1,
>>>    };
>>>    +static const struct qcom_sct_config qdu1000_cfgs = {
>>> +    .llcc_config    = qdu1000_cfg,
>>> +    .num_cfgs    = 1,
>>
>> Should not this be 4 ?
> Even better, use ARRAY_SIZE(name_of_arr)

Yes, Thanks for suggesting it.

-Komal

>
> Konrad