mbox series

[v4,00/17] rtc: pcf2127: add PCF2131 driver

Message ID 20230622145800.2442116-1-hugo@hugovil.com
Headers show
Series rtc: pcf2127: add PCF2131 driver | expand

Message

Hugo Villeneuve June 22, 2023, 2:57 p.m. UTC 
From: Hugo Villeneuve <hvilleneuve@dimonoff.com>

Hello,
this patch series adds the driver for the PCF2131 real-time clock.

This RTC is very similar in functionality to the PCF2127/29 with the
following differences:
  -supports two new control registers at offsets 4 and 5
  -supports a new reset register
  -supports 4 tamper detection functions instead of 1
  -has no nvmem (like the PCF2129)
  -has two output interrupt pins instead of one
  -has 1/100th seconds capabilities (not supported in this driver)
  -pcf2127 has watchdog clock sources: 1/60,   1, 64 and 4096Hz
   pcf2131 has watchdog clock sources: 1/64, 1/4,  4 and   64Hz
  -watchdog value register cannot be read after being set

Most of the register addresses are very different, although they still
follow the same layout. For example, the time/date and tamper registers
have a different base address, but the offsets are all the same.
Consequently, the source code of the PCF2127 driver can be easily adapted
to support this new device.

Patch 1 improves rtc_read_time() performance

Patch 2 improve timestamp reading performance

Patch 3 lowers error message severity

Patch 4 remove superfluous comments.

Patches 5 to 10 modify the existing pcf2127 driver to make it more generic
and able to support multiple variants, like the PCF2131. This is done
mostly by using offsets instead of absolute hardcoded register addresses.

Patch 11 add actual support for the PCF2131.

Patch 12 configures all interrupt sources to go through the INT A pin.

Patch 13 adapt the time/date registers write sequence for PCF2131 (STOP and
      CPR bits).

Patch 14 add support for generic watchdog timing configuration.

Patch 15 add a new flag to identify if device has read support for reading
      watchdog register value.
      Since the watchdog value register cannot be read on the PCF2131 after
      being set, it seems that we cannot detect if watchdog timer was
      started by bootloader. I am not sure what is the best way to handle
      this situation, suggestions are welcomed.

Patch 16 add UIE support for PCF2131

Patch 17 add the dt-bindings for the PCF2131.

I have tested the driver using a PCF2131-ARD evaluation board connected to
a Variscite imx8mn NANO SOM evaluation board:
  - Time get/set ok;
  - Alarms get/set ok
  - Timestamp 1 to 4 ok
  - IRQ alarm ok
  - Watchdog ok
  - Also tested successfully with "RTC Driver Test Example" from
    Documentation/rtc.txt

I have also tested the driver on a custom PCF2129 adapter board connected to
a Variscite imx8mn NANO SOM evaluation board.

Thank you.

Link: [v1] https://patchwork.ozlabs.org/project/rtc-linux/patch/20220125200009.900660-2-hugo@hugovil.com/
Link: [v2] https://patchwork.ozlabs.org/project/rtc-linux/list/?series=285734
Link: [v3] https://patchwork.ozlabs.org/project/rtc-linux/list/?series=332888

Changes for V2:
- In general, fix and improvements after I have tested on real hardware
- Fix alarm interrupt A/B mask setting for PCF2131:
  PCF2131_BIT_INT_AIE must be cleared, not set, to enable interrupt.
- Remove low_reg validation: only check if TS interrupt flag is
  defined, as low_reg is defined at address 0 for PCF2127/29.
- Change PWRMNG value for PCF2131: default is different than PCF2127/29.
- Adapt time/date registers write sequence for PCF2131 (STOP and CPR bits).
- Map all interrupt sources to INT A pin
- Read and validate PCF2131 device presence from RESET register
- Adapt watchdog configuration for PCF2131

Changes for V3:
- Rebase for kernel v6.1

Changes for V4:
- Rebase for kernel v6.4-rc7
- Add base-commit infos (git format-patch with --base= option)
- Rename regs_td_base -> reg_time_base
- Rename PCF2127_REG_TIME_DATE_BASE -> PCF2127_REG_TIME_BASE
- Remove/update comments
- Remove PCF2127_OFFSET_ALARM_* defines
- Remove PCF2127_OFFSET_TD_* defines
- Rename regs_base -> reg_base in struct pcf21xx_ts_config
- Remove identity string changes to not break userspace
- Explicitely set .inter_detect_bit to 0
- Replace hardcoded bit values with BIT() macros
- Remove reset register signature read
- Remove patch to set PWRMNG bits
- Rework to keep watchdog value store/computed inside the structure wdd
  (struct watchdog_device) to be in seconds.
- Rename confusing structure members
- Create separate patch for optimization of timestamp and time reading.
- Add UIE support for PCF2131

Hugo Villeneuve (17):
  rtc: pcf2127: improve rtc_read_time() performance
  rtc: pcf2127: improve timestamp reading performance
  rtc: pcf2127: lower message severity if setting time fails
  rtc: pcf2127: remove superfluous comments
  rtc: pcf2127: add variant-specific configuration structure
  rtc: pcf2127: adapt for time/date registers at any offset
  rtc: pcf2127: adapt for alarm registers at any offset
  rtc: pcf2127: adapt for WD registers at any offset
  rtc: pcf2127: adapt for CLKOUT register at any offset
  rtc: pcf2127: add support for multiple TS functions
  rtc: pcf2127: add support for PCF2131 RTC
  rtc: pcf2127: add support for PCF2131 interrupts on output INT_A
  rtc: pcf2127: adapt time/date registers write sequence for PCF2131
  rtc: pcf2127: support generic watchdog timing configuration
  rtc: pcf2127: add flag for watchdog register value read support
  rtc: pcf2127: add UIE support for PCF2131
  dt-bindings: rtc: pcf2127: add PCF2131

 .../devicetree/bindings/rtc/nxp,pcf2127.yaml  |   1 +
 drivers/rtc/Kconfig                           |   4 +-
 drivers/rtc/rtc-pcf2127.c                     | 874 ++++++++++++++----
 3 files changed, 691 insertions(+), 188 deletions(-)


base-commit: dad9774deaf1cf8e8f7483310dfb2690310193d2

Comments

Alexandre Belloni July 27, 2023, 8:57 p.m. UTC | #1 
On Thu, 22 Jun 2023 10:57:43 -0400, Hugo Villeneuve wrote:
> From: Hugo Villeneuve <hvilleneuve@dimonoff.com>
> 
> Hello,
> this patch series adds the driver for the PCF2131 real-time clock.
> 
> This RTC is very similar in functionality to the PCF2127/29 with the
> following differences:
>   -supports two new control registers at offsets 4 and 5
>   -supports a new reset register
>   -supports 4 tamper detection functions instead of 1
>   -has no nvmem (like the PCF2129)
>   -has two output interrupt pins instead of one
>   -has 1/100th seconds capabilities (not supported in this driver)
>   -pcf2127 has watchdog clock sources: 1/60,   1, 64 and 4096Hz
>    pcf2131 has watchdog clock sources: 1/64, 1/4,  4 and   64Hz
>   -watchdog value register cannot be read after being set
> 
> [...]

Applied, thanks!

[01/17] rtc: pcf2127: improve rtc_read_time() performance
        commit: 31f077c374a8e7cf1960560c0c5e4065048557c0
[02/17] rtc: pcf2127: improve timestamp reading performance
        commit: 720fb4b83b565c7ae31059620e960ecbf5dc73a3
[03/17] rtc: pcf2127: lower message severity if setting time fails
        commit: 3d740c647ff8b77b2a560ebd95ac746c46f49ed4
[04/17] rtc: pcf2127: remove superfluous comments
        commit: 0476b6c8e8b1a6dfa3a259bc7e3c135145532c71
[05/17] rtc: pcf2127: add variant-specific configuration structure
        commit: fd28ceb4603f9541dcb4ed12b1365cff5af38203
[06/17] rtc: pcf2127: adapt for time/date registers at any offset
        commit: 6211acee8edf4af61f7745a92c4b4cb05a4340f9
[07/17] rtc: pcf2127: adapt for alarm registers at any offset
        commit: 7c6f0db41ab5fbd7ee3a2f9880ac23509a5d55d1
[08/17] rtc: pcf2127: adapt for WD registers at any offset
        commit: 6b57ec29e3fc31d43e672f6fede5d4a76140308b
[09/17] rtc: pcf2127: adapt for CLKOUT register at any offset
        commit: fc16599e0153e91ba12d856e40f6fc56906077f1
[10/17] rtc: pcf2127: add support for multiple TS functions
        commit: 420cc9e850dbc8e6ea7dd1e53d62d64cd8766354
[11/17] rtc: pcf2127: add support for PCF2131 RTC
        commit: afc505bf9039caf5a377d8b9705ef42f6d4ac7d4
[12/17] rtc: pcf2127: add support for PCF2131 interrupts on output INT_A
        commit: e1849b8fcdfaa71f2e8f9376c9568877ff2bf52b
[13/17] rtc: pcf2127: adapt time/date registers write sequence for PCF2131
        commit: 3d715ebaf006bd5a495e9a717cf0fc5c260ee738
[14/17] rtc: pcf2127: support generic watchdog timing configuration
        commit: adb9675d74e403537150f025ed2b7a2e1ed0a7b4
[15/17] rtc: pcf2127: add flag for watchdog register value read support
        commit: 081602a1d85b1fd7ad9ea298cffb4e5ad5296952
[16/17] rtc: pcf2127: add UIE support for PCF2131
        commit: e9a5a1b418dd9a82d1de71e82ec64ad195b5300a
[17/17] dt-bindings: rtc: pcf2127: add PCF2131
        commit: 2080e08460c41c6d432575132868fdf076768c92

Best regards,
Hugo Villeneuve July 28, 2023, 5:13 p.m. UTC | #2 
On Thu, 27 Jul 2023 22:57:41 +0200
Alexandre Belloni <alexandre.belloni@bootlin.com> wrote:

> 
> On Thu, 22 Jun 2023 10:57:43 -0400, Hugo Villeneuve wrote:
> > From: Hugo Villeneuve <hvilleneuve@dimonoff.com>
> > 
> > Hello,
> > this patch series adds the driver for the PCF2131 real-time clock.
> > 
> > This RTC is very similar in functionality to the PCF2127/29 with the
> > following differences:
> >   -supports two new control registers at offsets 4 and 5
> >   -supports a new reset register
> >   -supports 4 tamper detection functions instead of 1
> >   -has no nvmem (like the PCF2129)
> >   -has two output interrupt pins instead of one
> >   -has 1/100th seconds capabilities (not supported in this driver)
> >   -pcf2127 has watchdog clock sources: 1/60,   1, 64 and 4096Hz
> >    pcf2131 has watchdog clock sources: 1/64, 1/4,  4 and   64Hz
> >   -watchdog value register cannot be read after being set
> > 
> > [...]
> 
> Applied, thanks!

Thank you :)
Hugo.


> [01/17] rtc: pcf2127: improve rtc_read_time() performance
>         commit: 31f077c374a8e7cf1960560c0c5e4065048557c0
> [02/17] rtc: pcf2127: improve timestamp reading performance
>         commit: 720fb4b83b565c7ae31059620e960ecbf5dc73a3
> [03/17] rtc: pcf2127: lower message severity if setting time fails
>         commit: 3d740c647ff8b77b2a560ebd95ac746c46f49ed4
> [04/17] rtc: pcf2127: remove superfluous comments
>         commit: 0476b6c8e8b1a6dfa3a259bc7e3c135145532c71
> [05/17] rtc: pcf2127: add variant-specific configuration structure
>         commit: fd28ceb4603f9541dcb4ed12b1365cff5af38203
> [06/17] rtc: pcf2127: adapt for time/date registers at any offset
>         commit: 6211acee8edf4af61f7745a92c4b4cb05a4340f9
> [07/17] rtc: pcf2127: adapt for alarm registers at any offset
>         commit: 7c6f0db41ab5fbd7ee3a2f9880ac23509a5d55d1
> [08/17] rtc: pcf2127: adapt for WD registers at any offset
>         commit: 6b57ec29e3fc31d43e672f6fede5d4a76140308b
> [09/17] rtc: pcf2127: adapt for CLKOUT register at any offset
>         commit: fc16599e0153e91ba12d856e40f6fc56906077f1
> [10/17] rtc: pcf2127: add support for multiple TS functions
>         commit: 420cc9e850dbc8e6ea7dd1e53d62d64cd8766354
> [11/17] rtc: pcf2127: add support for PCF2131 RTC
>         commit: afc505bf9039caf5a377d8b9705ef42f6d4ac7d4
> [12/17] rtc: pcf2127: add support for PCF2131 interrupts on output INT_A
>         commit: e1849b8fcdfaa71f2e8f9376c9568877ff2bf52b
> [13/17] rtc: pcf2127: adapt time/date registers write sequence for PCF2131
>         commit: 3d715ebaf006bd5a495e9a717cf0fc5c260ee738
> [14/17] rtc: pcf2127: support generic watchdog timing configuration
>         commit: adb9675d74e403537150f025ed2b7a2e1ed0a7b4
> [15/17] rtc: pcf2127: add flag for watchdog register value read support
>         commit: 081602a1d85b1fd7ad9ea298cffb4e5ad5296952
> [16/17] rtc: pcf2127: add UIE support for PCF2131
>         commit: e9a5a1b418dd9a82d1de71e82ec64ad195b5300a
> [17/17] dt-bindings: rtc: pcf2127: add PCF2131
>         commit: 2080e08460c41c6d432575132868fdf076768c92
> 
> Best regards,
> 
> -- 
> Alexandre Belloni, co-owner and COO, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com
>