[0/2] Add support for Intel SocFPGA DWC3 USB controller

From: Adrian Ng Ho Yin <adrian.ho.yin.ng@intel.com>

This patch set adds binding for Intel SoCFPGA DWC3 controller.
The new binding differs from the existing binding intel,keembay-dwc3.yaml
as the required properties are different.
This patch also adds compatible string for Intel Agilex5 in DWC3 simple
glue driver.

Adrian Ng Ho Yin (2):
  dt-bindings: usb: Add Intel SoCFPGA USB controller bindings
  usb: dwc3: of-simple: Add compatible string for Intel Agilex5 platform

 .../bindings/usb/intel,socfpga-dwc3.yaml      | 78 +++++++++++++++++++
 drivers/usb/dwc3/dwc3-of-simple.c             |  1 +
 2 files changed, 79 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/usb/intel,socfpga-dwc3.yaml

> On 21/07/2023 06:30, adrian.ho.yin.ng@intel.com wrote:
> > From: Adrian Ng Ho Yin <adrian.ho.yin.ng@intel.com>
> >
> > Existing binding intel,keembay-dwc3.yaml does not have the required 
> > properties for Intel SoCFPGA devices.
> > Introduce new binding description for Intel SoCFPGA USB controller 
> > which will be used for current and future SoCFPGA devices.
> >
> > Signed-off-by: Adrian Ng Ho Yin <adrian.ho.yin.ng@intel.com>
> 
> A nit, subject: drop second/last, redundant "bindings". The 
> "dt-bindings" prefix is already stating that these are bindings.

Dropped "bindings" in V2 patch.

> 
> > ---
> >  .../bindings/usb/intel,socfpga-dwc3.yaml      | 78 +++++++++++++++++++
> >  1 file changed, 78 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/usb/intel,socfpga-dwc3.yaml
> 
> Filename matching compatible.

Update compatible to match file name in V2 patch.

> 
> >
> > diff --git
> > a/Documentation/devicetree/bindings/usb/intel,socfpga-dwc3.yaml
> > b/Documentation/devicetree/bindings/usb/intel,socfpga-dwc3.yaml
> > new file mode 100644
> > index 000000000000..dedef70df887
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/usb/intel,socfpga-dwc3.yaml
> > @@ -0,0 +1,78 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/usb/intel,socfpga-dwc3.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Intel SoCFPGA DWC3 USB controller
> > +
> > +maintainers:
> > +  - Adrian Ng Ho Yin <adrian.ho.yin.ng@intel.com>
> > +
> > +properties:
> > +  compatible:
> > +    const: intel,agilex5-dwc3
> 
> Why using compatible style different than other Agilex blocks? Which 
> one is recommended/official/correct?

This style is used so that future SoCFPGA products can reuse the same binding. 

> 
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  clocks:
> > +    maxItems: 2
> 
> What are the items?
> 

Update with items description and dropped maxItems  for clocks in V2 patch.

> > +
> > +  ranges: true
> > +
> > +  resets:
> > +    maxItems: 2
> > +
> > +  reset-names:
> > +    items:
> > +      - const: dwc3
> > +      - const: dwc3-ecc
> > +
> > +  '#address-cells':
> > +    enum: [ 1, 2 ]
> > +
> > +  '#size-cells':
> > +    enum: [ 1, 2 ]
> > +
> > +# Required child node:
> > +
> > +patternProperties:
> > +  "^usb@[0-9a-f]+$":
> > +    $ref: snps,dwc3.yaml#
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - clocks
> > +  - resets
> > +  - ranges
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +    #include <dt-bindings/interrupt-controller/irq.h>
> > +    #include <dt-bindings/reset/altr,rst-mgr.h>
> > +    #define AGILEX5_USB31_SUSPEND_CLK
> > +    #define AGILEX5_USB31_BUS_CLK_EARLY
> 
> Drop defines. Include proper header or use some numbers, if the 
> headers are not there yet.

Removed defines and update to use numbers. 

> 
> > +
> > +    usb1@11000000 {
> 
> Node names should be generic. See also an explanation and list of 
> examples (not
> exhaustive) in DT specification:
> https://devicetree-specification.readthedocs.io/en/latest/chapter2-dev
> icetree- basics.html#generic-names-recommendation
> 
> 
> > +          compatible = "intel,agilex5-dwc3";

Update node name to be generic in V2 patch.

Thank You
Adrian Ng

On 24/07/2023 08:35, Ng, Adrian Ho Yin wrote:
>>> diff --git
>>> a/Documentation/devicetree/bindings/usb/intel,socfpga-dwc3.yaml
>>> b/Documentation/devicetree/bindings/usb/intel,socfpga-dwc3.yaml
>>> new file mode 100644
>>> index 000000000000..dedef70df887
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/usb/intel,socfpga-dwc3.yaml
>>> @@ -0,0 +1,78 @@
>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
>>> +---
>>> +$id: http://devicetree.org/schemas/usb/intel,socfpga-dwc3.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: Intel SoCFPGA DWC3 USB controller
>>> +
>>> +maintainers:
>>> +  - Adrian Ng Ho Yin <adrian.ho.yin.ng@intel.com>
>>> +
>>> +properties:
>>> +  compatible:
>>> +    const: intel,agilex5-dwc3
>>
>> Why using compatible style different than other Agilex blocks? Which 
>> one is recommended/official/correct?
> 
> This style is used so that future SoCFPGA products can reuse the same binding. 

Wait, why? How future products are relevant to style of compatible for
existing device? Again - why using different style? Which one is correct?


Best regards,
Krzysztof