| Message ID | 20230723141550.90223-1-krzysztof.kozlowski@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | [1/2] dt-bindings: usb: qcom,dwc3: drop assigned-clocks | expand |
On Sun, 23 Jul 2023 16:15:49 +0200, Krzysztof Kozlowski wrote: > The binding does not have to specify assigned-clocks, because they are > already allowed by core DT schema. On the other hand, fixed > assigned-clocks in the binding will not fit different boards or SoCs. > Exactly this is the case for Qualcomm SuperSpeed DWC3 USB SoC controller > binding, where few boards have different assigned-clocks: > > ipq8074-hk10-c1.dtb: usb@8cf8800: assigned-clocks: [[5, 131], [5, 132], [5, 133]] is too long > sdm660-xiaomi-lavender.dtb: usb@a8f8800: assigned-clocks: [[37, 92], [37, 91], [38, 64]] is too long > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 9 --------- > 1 file changed, 9 deletions(-) > Reviewed-by: Rob Herring <robh@kernel.org>
On Sun, 23 Jul 2023 16:15:50 +0200, Krzysztof Kozlowski wrote: > SDM660 SoC has two instances of DWC3 USB controller: one supporting USB > 3.0 and one supporting only up to USB 2.0. The latter one does not use > iface clock, so allow such variant to fix dtbs_check warnings: > > sda660-inforce-ifc6560.dtb: usb@c2f8800: clocks: [[37, 48], [37, 88], [37, 89], [37, 90]] is too short > sda660-inforce-ifc6560.dtb: usb@c2f8800: clock-names:2: 'iface' was expected > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > .../devicetree/bindings/usb/qcom,dwc3.yaml | 24 ++++++++++++------- > 1 file changed, 16 insertions(+), 8 deletions(-) > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index 08d42fde466a..7cedd751161d 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -85,15 +85,6 @@ properties: minItems: 1 maxItems: 9 - assigned-clocks: - items: - - description: Phandle and clock specifier of MOCK_UTMI_CLK. - - description: Phandle and clock specifoer of MASTER_CLK. - - assigned-clock-rates: - items: - - description: Must be 19.2MHz (19200000). - - description: Must be >= 60 MHz in HS mode, >= 125 MHz in SS mode. resets: maxItems: 1
The binding does not have to specify assigned-clocks, because they are already allowed by core DT schema. On the other hand, fixed assigned-clocks in the binding will not fit different boards or SoCs. Exactly this is the case for Qualcomm SuperSpeed DWC3 USB SoC controller binding, where few boards have different assigned-clocks: ipq8074-hk10-c1.dtb: usb@8cf8800: assigned-clocks: [[5, 131], [5, 132], [5, 133]] is too long sdm660-xiaomi-lavender.dtb: usb@a8f8800: assigned-clocks: [[37, 92], [37, 91], [38, 64]] is too long Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 9 --------- 1 file changed, 9 deletions(-)