| Message ID | 20230724150002.5645-1-sjakhade@cadence.com |
|---|---|
| Headers | show |
| Series | PHY: Add support for dual refclk configurations in Cadence Torrent PHY driver | expand |
On Mon, Jul 24, 2023 at 04:59:58PM +0200, Swapnil Jakhade wrote: > Torrent(SD0801) PHY supports two input reference clocks. Update bindings > to support dual reference clock multilink configurations. > > Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> > --- > .../bindings/phy/phy-cadence-torrent.yaml | 23 +++++++++++++------ > 1 file changed, 16 insertions(+), 7 deletions(-) > > diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml > index dfb31314face..ddb86ee0cebf 100644 > --- a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml > +++ b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml > @@ -33,16 +33,25 @@ properties: > > clocks: > minItems: 1 > - maxItems: 2 > + maxItems: 3 > description: > - PHY reference clock for 1 item. Must contain an entry in clock-names. > - Optional Parent to enable output reference clock. > + PHY input reference clocks (refclk & refclk1). "refclk" and "refclk1" don't seem like great names. What is each one used for & should refclk1 be renamed to match its use case? > + Optional Parent to enable output reference clock (phy_en_refclk). > > clock-names: > - minItems: 1 > - items: > - - const: refclk > - - const: phy_en_refclk > + oneOf: > + - items: > + - const: refclk > + - items: > + - const: refclk > + - const: phy_en_refclk > + - items: > + - const: refclk > + - const: refclk1 > + - items: > + - const: refclk > + - const: refclk1 > + - const: phy_en_refclk > > reg: > minItems: 1 > -- > 2.34.1 >
On Mon, Dec 11, 2023 at 02:45:48PM +0200, Roger Quadros wrote: > Hi Conor, > > On 24/07/2023 20:53, Conor Dooley wrote: > > On Mon, Jul 24, 2023 at 04:59:58PM +0200, Swapnil Jakhade wrote: > >> Torrent(SD0801) PHY supports two input reference clocks. Update bindings > >> to support dual reference clock multilink configurations. > >> > >> Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> > >> --- > >> .../bindings/phy/phy-cadence-torrent.yaml | 23 +++++++++++++------ > >> 1 file changed, 16 insertions(+), 7 deletions(-) > >> > >> diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml > >> index dfb31314face..ddb86ee0cebf 100644 > >> --- a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml > >> +++ b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml > >> @@ -33,16 +33,25 @@ properties: > >> > >> clocks: > >> minItems: 1 > >> - maxItems: 2 > >> + maxItems: 3 > >> description: > >> - PHY reference clock for 1 item. Must contain an entry in clock-names. > >> - Optional Parent to enable output reference clock. > >> + PHY input reference clocks (refclk & refclk1). > > > > "refclk" and "refclk1" don't seem like great names. What is each one > > used for & should refclk1 be renamed to match its use case? > > All PHYs need one refclk input. "refclk" > Some PHY variants can take a second refclk input. Both are refclks so it was > chosen to add an "1" to the name to the 2nd refclk. > Please suggest if you have a better idea. Thanks! The existing second clock name (phy_en_refclk) might serve as inspiration. What is the additional role that the second reference serves? > > > > >> + Optional Parent to enable output reference clock (phy_en_refclk). > >> > >> clock-names: > >> - minItems: 1 > >> - items: > >> - - const: refclk > >> - - const: phy_en_refclk > >> + oneOf: > >> + - items: > >> + - const: refclk > >> + - items: > >> + - const: refclk > >> + - const: phy_en_refclk > >> + - items: > >> + - const: refclk > >> + - const: refclk1 > >> + - items: > >> + - const: refclk > >> + - const: refclk1 > >> + - const: phy_en_refclk > >> > >> reg: > >> minItems: 1 > >> -- > >> 2.34.1 > >> > > -- > cheers, > -roger
This patch series extends Torrent PHY driver functionality to support dual input reference clocks. It also adds support for following multilink configurations: - PCIe(100MHz) + USXGMII(156.25MHz) - USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) The changes have been validated on TI J721E and J7200 platforms. Swapnil Jakhade (5): dt-bindings: phy: cadence-torrent: Add second optional input reference clock phy: cadence-torrent: Add PCIe(100MHz) + USXGMII(156.25MHz) multilink configuration phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) multilink configuration dt-bindings: phy: cadence-torrent: Add a separate compatible for TI J7200 phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) multilink config for TI J7200 .../bindings/phy/phy-cadence-torrent.yaml | 24 +- drivers/phy/cadence/phy-cadence-torrent.c | 705 +++++++++++++++++- 2 files changed, 719 insertions(+), 10 deletions(-)