Message ID | 20230720131016.331793-6-biju.das.jz@bp.renesas.com |
---|---|
State | New |
Headers | show |
Series | Add RZ/G2UL MTU3a support | expand |
Hi Biju,
kernel test robot noticed the following build errors:
[auto build test ERROR on geert-renesas-devel/next]
[also build test ERROR on robh/for-next linus/master v6.5-rc2 next-20230721]
[cannot apply to tip/timers/core]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Biju-Das/dt-bindings-timer-renesas-rz-mtu3-Improve-documentation/20230720-213033
base: https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git next
patch link: https://lore.kernel.org/r/20230720131016.331793-6-biju.das.jz%40bp.renesas.com
patch subject: [PATCH 5/6] arm64: dts: renesas: r9a07g043: Add MTU3a node
config: riscv-allmodconfig (https://download.01.org/0day-ci/archive/20230722/202307221318.jz5pDcvU-lkp@intel.com/config)
compiler: riscv64-linux-gcc (GCC) 12.3.0
reproduce: (https://download.01.org/0day-ci/archive/20230722/202307221318.jz5pDcvU-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202307221318.jz5pDcvU-lkp@intel.com/
All errors (new ones prefixed by >>):
>> Error: scripts/dtc/include-prefixes/arm64/renesas/r9a07g043.dtsi:81.18-19 syntax error
FATAL ERROR: Unable to parse input tree
Hi Kernel test robot, Thaks for the feedback. > -----Original Message----- > From: kernel test robot <lkp@intel.com> > Sent: Saturday, July 22, 2023 6:16 AM > To: Biju Das <biju.das.jz@bp.renesas.com>; Rob Herring > <robh+dt@kernel.org>; Krzysztof Kozlowski <krzk@kernel.org>; Conor > Dooley <conor+dt@kernel.org> > Cc: oe-kbuild-all@lists.linux.dev; Biju Das > <biju.das.jz@bp.renesas.com>; Geert Uytterhoeven > <geert+renesas@glider.be>; Magnus Damm <magnus.damm@gmail.com>; linux- > renesas-soc@vger.kernel.org; devicetree@vger.kernel.org; Fabrizio Castro > <fabrizio.castro.jz@renesas.com>; Prabhakar Mahadev Lad > <prabhakar.mahadev-lad.rj@bp.renesas.com> > Subject: Re: [PATCH 5/6] arm64: dts: renesas: r9a07g043: Add MTU3a node > > Hi Biju, > > kernel test robot noticed the following build errors: > > [auto build test ERROR on geert-renesas-devel/next] [also build test > ERROR on robh/for-next linus/master v6.5-rc2 next-20230721] [cannot > apply to tip/timers/core] [If your patch is applied to the wrong git > tree, kindly drop us a note. > And when submitting patch, we suggest to use '--base' as documented in Opps, Need to use <SOC_PERIPHERAL_IRQ> for interrupts as there is difference between arm64 and risc-v. Will send v2 after testing on both arm64 and risc-v. Cheers, Biju > If you fix the issue in a separate patch/commit (i.e. not just a new > version of the same patch/commit), kindly add following tags > | Reported-by: kernel test robot <lkp@intel.com> > | Closes: > > All errors (new ones prefixed by >>): > > >> Error: > >> scripts/dtc/include-prefixes/arm64/renesas/r9a07g043.dtsi:81.18-19 > >> syntax error > FATAL ERROR: Unable to parse input tree > > -- > 0-DAY CI Kernel Test Service > https://jpn01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub > .com%2Fintel%2Flkp- > tests%2Fwiki&data=05%7C01%7Cbiju.das.jz%40bp.renesas.com%7C0d92a2b8f7784 > 0058e3708db8a72d705%7C53d82571da1947e49cb4625a166a4a2a%7C0%7C0%7C6382559 > 98068843802%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIi > LCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=IddHS16rE6UW3JnsY1s > mg6bJ%2BMFLDHIjIsA%2FWjaPO8w%3D&reserved=0
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi index 27c35a657b15..c4dca72243db 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi @@ -74,6 +74,76 @@ soc: soc { #size-cells = <2>; ranges; + mtu3: timer@10001200 { + compatible = "renesas,r9a07g043-mtu3", + "renesas,rz-mtu3"; + reg = <0 0x10001200 0 0xb00>; + interrupts = <GIC_SPI 170 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 171 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 172 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 173 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 174 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 175 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 176 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 178 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 179 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 180 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 181 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 182 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 183 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 184 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 185 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 186 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 187 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 191 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 192 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 194 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 201 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 202 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 204 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 205 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 206 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 207 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 211 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 212 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 213 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "tgia0", "tgib0", "tgic0", "tgid0", + "tciv0", "tgie0", "tgif0", + "tgia1", "tgib1", "tciv1", "tciu1", + "tgia2", "tgib2", "tciv2", "tciu2", + "tgia3", "tgib3", "tgic3", "tgid3", + "tciv3", + "tgia4", "tgib4", "tgic4", "tgid4", + "tciv4", + "tgiu5", "tgiv5", "tgiw5", + "tgia6", "tgib6", "tgic6", "tgid6", + "tciv6", + "tgia7", "tgib7", "tgic7", "tgid7", + "tciv7", + "tgia8", "tgib8", "tgic8", "tgid8", + "tciv8", "tciu8"; + clocks = <&cpg CPG_MOD R9A07G043_MTU_X_MCK_MTU3>; + power-domains = <&cpg>; + resets = <&cpg R9A07G043_MTU_X_PRESET_MTU3>; + #pwm-cells = <2>; + status = "disabled"; + }; + ssi0: ssi@10049c00 { compatible = "renesas,r9a07g043-ssi", "renesas,rz-ssi";
Add MTU3a node to R9A07G043 (RZ/G2UL) SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 70 ++++++++++++++++++++++ 1 file changed, 70 insertions(+)