| Message ID | 20230719224141.3716815-1-james.hilliard1@gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v2,1/2] ARM: dts: imx6qdl: Add Variscite VAR-SOM-MX6 SoM support | expand |
On 20/07/2023 00:41, James Hilliard wrote: > This patch adds support for the Variscite MX6 SoM Carrier Board. > > This Carrier-Board has the following : > - LVDS interface for the VLCD-CAP-GLD-LVDS 7" LCD 800 x 480 touch display > - HDMI Connector > - USB Host + USB OTG Connector > - 10/100/1000 Mbps Ethernet > - miniPCI-Express slot > - SD Card connector > - Audio Headphone/Line In jack connectors > - S-ATA > - On-board DMIC > - RS485 Header > - CAN bus header > - SPI header > - Camera Interfaces header > - OnBoard RTC with Coin Backup battery socket > - RS232 Debug Header (IDC10) > - RS232 DTE > > Product Page : https://www.variscite.com/product/single-board-computers/var-mx6customboard > > The dts file based on the ones provided by Variscite on their own > kernel, but adapted for mainline. > > Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> > Signed-off-by: James Hilliard <james.hilliard1@gmail.com> > --- > .../devicetree/bindings/arm/fsl.yaml | 1 + Please run scripts/checkpatch.pl and fix reported warnings. Some warnings can be ignored, but the code here looks like it needs a fix. Feel free to get in touch if the warning is not clear. > arch/arm/boot/dts/Makefile | 1 + > .../arm/boot/dts/imx6q-var-mx6customboard.dts | 279 ++++++++++++++++++ > 3 files changed, 281 insertions(+) > create mode 100644 arch/arm/boot/dts/imx6q-var-mx6customboard.dts > > diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml > index 15d411084065..0f583852de8a 100644 > --- a/Documentation/devicetree/bindings/arm/fsl.yaml > +++ b/Documentation/devicetree/bindings/arm/fsl.yaml > @@ -298,6 +298,7 @@ properties: > - udoo,imx6q-udoo # Udoo i.MX6 Quad Board > - uniwest,imx6q-evi # Uniwest Evi > - variscite,dt6customboard > + - variscite,mx6customboard > - wand,imx6q-wandboard # Wandboard i.MX6 Quad Board > - ysoft,imx6q-yapp4-crux # i.MX6 Quad Y Soft IOTA Crux board > - ysoft,imx6q-yapp4-pegasus # i.MX6 Quad Y Soft IOTA Pegasus board > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile > index 59829fc90315..9cfc3d3e91ea 100644 > --- a/arch/arm/boot/dts/Makefile > +++ b/arch/arm/boot/dts/Makefile > @@ -665,6 +665,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ > imx6q-udoo.dtb \ > imx6q-utilite-pro.dtb \ > imx6q-var-dt6customboard.dtb \ > + imx6q-var-mx6customboard.dtb \ > imx6q-vicut1.dtb \ > imx6q-wandboard.dtb \ > imx6q-wandboard-revb1.dtb \ > diff --git a/arch/arm/boot/dts/imx6q-var-mx6customboard.dts b/arch/arm/boot/dts/imx6q-var-mx6customboard.dts > new file mode 100644 > index 000000000000..66047dff11ec > --- /dev/null > +++ b/arch/arm/boot/dts/imx6q-var-mx6customboard.dts > @@ -0,0 +1,279 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Support for Variscite MX6 Carrier-board > + * > + * Copyright 2016 Variscite, Ltd. All Rights Reserved > + * Copyright 2022 Bootlin > + */ > + > +/dts-v1/; > + > +#include "imx6qdl-var-som.dtsi" > +#include <dt-bindings/pwm/pwm.h> > + > +/ { > + model = "Variscite i.MX6 QUAD/DUAL VAR-SOM-MX6 Custom Board"; > + compatible = "variscite,mx6customboard", "fsl,imx6q"; Where is the SoM compatible? Best regards, Krzysztof
On 20/07/2023 12:49, James Hilliard wrote: > On Thu, Jul 20, 2023 at 12:15 AM Krzysztof Kozlowski > <krzysztof.kozlowski@linaro.org> wrote: >> >> On 20/07/2023 00:41, James Hilliard wrote: >>> This patch adds support for the Variscite MX6 SoM Carrier Board. >>> >>> This Carrier-Board has the following : >>> - LVDS interface for the VLCD-CAP-GLD-LVDS 7" LCD 800 x 480 touch display >>> - HDMI Connector >>> - USB Host + USB OTG Connector >>> - 10/100/1000 Mbps Ethernet >>> - miniPCI-Express slot >>> - SD Card connector >>> - Audio Headphone/Line In jack connectors >>> - S-ATA >>> - On-board DMIC >>> - RS485 Header >>> - CAN bus header >>> - SPI header >>> - Camera Interfaces header >>> - OnBoard RTC with Coin Backup battery socket >>> - RS232 Debug Header (IDC10) >>> - RS232 DTE >>> >>> Product Page : https://www.variscite.com/product/single-board-computers/var-mx6customboard >>> >>> The dts file based on the ones provided by Variscite on their own >>> kernel, but adapted for mainline. >>> >>> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> >>> Signed-off-by: James Hilliard <james.hilliard1@gmail.com> >>> --- >>> .../devicetree/bindings/arm/fsl.yaml | 1 + >> >> Please run scripts/checkpatch.pl and fix reported warnings. Some >> warnings can be ignored, but the code here looks like it needs a fix. >> Feel free to get in touch if the warning is not clear. >> >>> arch/arm/boot/dts/Makefile | 1 + >>> .../arm/boot/dts/imx6q-var-mx6customboard.dts | 279 ++++++++++++++++++ >>> 3 files changed, 281 insertions(+) >>> create mode 100644 arch/arm/boot/dts/imx6q-var-mx6customboard.dts >>> >>> diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml >>> index 15d411084065..0f583852de8a 100644 >>> --- a/Documentation/devicetree/bindings/arm/fsl.yaml >>> +++ b/Documentation/devicetree/bindings/arm/fsl.yaml >>> @@ -298,6 +298,7 @@ properties: >>> - udoo,imx6q-udoo # Udoo i.MX6 Quad Board >>> - uniwest,imx6q-evi # Uniwest Evi >>> - variscite,dt6customboard >>> + - variscite,mx6customboard >>> - wand,imx6q-wandboard # Wandboard i.MX6 Quad Board >>> - ysoft,imx6q-yapp4-crux # i.MX6 Quad Y Soft IOTA Crux board >>> - ysoft,imx6q-yapp4-pegasus # i.MX6 Quad Y Soft IOTA Pegasus board >>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile >>> index 59829fc90315..9cfc3d3e91ea 100644 >>> --- a/arch/arm/boot/dts/Makefile >>> +++ b/arch/arm/boot/dts/Makefile >>> @@ -665,6 +665,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ >>> imx6q-udoo.dtb \ >>> imx6q-utilite-pro.dtb \ >>> imx6q-var-dt6customboard.dtb \ >>> + imx6q-var-mx6customboard.dtb \ >>> imx6q-vicut1.dtb \ >>> imx6q-wandboard.dtb \ >>> imx6q-wandboard-revb1.dtb \ >>> diff --git a/arch/arm/boot/dts/imx6q-var-mx6customboard.dts b/arch/arm/boot/dts/imx6q-var-mx6customboard.dts >>> new file mode 100644 >>> index 000000000000..66047dff11ec >>> --- /dev/null >>> +++ b/arch/arm/boot/dts/imx6q-var-mx6customboard.dts >>> @@ -0,0 +1,279 @@ >>> +// SPDX-License-Identifier: GPL-2.0+ >>> +/* >>> + * Support for Variscite MX6 Carrier-board >>> + * >>> + * Copyright 2016 Variscite, Ltd. All Rights Reserved >>> + * Copyright 2022 Bootlin >>> + */ >>> + >>> +/dts-v1/; >>> + >>> +#include "imx6qdl-var-som.dtsi" >>> +#include <dt-bindings/pwm/pwm.h> >>> + >>> +/ { >>> + model = "Variscite i.MX6 QUAD/DUAL VAR-SOM-MX6 Custom Board"; >>> + compatible = "variscite,mx6customboard", "fsl,imx6q"; >> >> Where is the SoM compatible? > > I mostly just copied this from the DART-MX6 device tree which is > another variscite > imx6q based modular SoM custom board combination: > https://github.com/torvalds/linux/blob/v6.5-rc2/arch/arm/boot/dts/nxp/imx/imx6q-var-dt6customboard.dts#L17 > > The terminology is a bit confusing in general here, variscite has 2 > families of pin2pin > modules, the "VAR-SOM" and the "DART" family. > https://www.variscite.com/variscite-pin2pin-system-on-module-families/ I know, I am familiar with them. > > Within each connector family there are then multiple SoM boards that > can be used with the same carrier boards(ie the Custom Board carrier board > like the evaluation kit) although they are often bundled together with specific > boards in practice. No, they are being shipped to the customers which then use them in their products. Having common compatible can be useful, although it depends what's in the common part. For example for IMX8 it was quite a lot, thus it made sense. > > So the existing DART-MX6 I think uses the same SoC but is in a different > family and as such has a different carrier board. However as the relation > between the SoM and the carrier board is effectively the same, I just copied > the way compatibile is being set there for the VAR-SOM-MX6 from the > existing DART-MX6 custom board device tree. > > I think this roughly represents the SoM board device tree associations as I'm > understanding them: > > pin2pin Family: DART > SoM: https://www.variscite.com/product/system-on-module-som/cortex-a9/dart-mx6-cpu-freescale-imx6/ > SoM part: DART-MX6 > SoM device tree: imx6qdl-var-dart.dtsi > SoM SoC: imx6q > Board: https://www.variscite.com/product/single-board-computers/dt6customboard/ > Board device tree: imx6q-var-dt6customboard.dts > Board compatible: compatible = "variscite,dt6customboard", "fsl,imx6q"; > > pin2pin Family: VAR-SOM > SoM: https://www.variscite.com/product/system-on-module-som/cortex-a9/var-som-mx6-cpu-freescale-imx6/ > SoM part: VAR-SOM-MX6 > SoM device tree: imx6qdl-var-som.dtsi > SoM SoC: imx6q > Board: mx6customboard > https://www.variscite.com/product/single-board-computers/var-mx6customboard/ > Board device tree: imx6q-var-mx6customboard.dts > Board compatible: compatible = "variscite,mx6customboard", "fsl,imx6q"; > > What's confusing here is that the DART-MX6 is also described as a SoM: > "DART-MX6 from Variscite is the smallest System on Module (SoM) / Computer > on Module (CoM) supporting NXP/Freescale’s i.MX6 Quad and Dual-core > Cortex-A9™ processor" It is not confusing. It is a SoM. > > So we have a "DART-MX6" SoM part which corresponds to the "VAR-SOM-MX6" > SoM part, with both being SoM's but only one("VAR-SOM-MX6") having SoM in > the actual part name. Vendor naming is one thing, but true meaning is second. These are System-on-Modules. > > Does the compatible section for imx6qdl-var-dart.dtsi look correct? > > I'm not sure what exactly a "SoM compatible" should look like here as SoM is > both a generic term(used to describe by both the "DART-MX6" and > "VAR-SOM-MX6" parts) as well as term used within a part(used in the > part for "VAR-SOM-MX6" as well as other SoM's in the "VAR-SOM" family > but not the "DART-MX6" part or other SoM's in the "DART" family). Take a look at IMX8 Variscite SoMs. Best regards, Krzysztof
On Thu, Jul 20, 2023 at 5:39 AM Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 20/07/2023 12:49, James Hilliard wrote: > > On Thu, Jul 20, 2023 at 12:15 AM Krzysztof Kozlowski > > <krzysztof.kozlowski@linaro.org> wrote: > >> > >> On 20/07/2023 00:41, James Hilliard wrote: > >>> This patch adds support for the Variscite MX6 SoM Carrier Board. > >>> > >>> This Carrier-Board has the following : > >>> - LVDS interface for the VLCD-CAP-GLD-LVDS 7" LCD 800 x 480 touch display > >>> - HDMI Connector > >>> - USB Host + USB OTG Connector > >>> - 10/100/1000 Mbps Ethernet > >>> - miniPCI-Express slot > >>> - SD Card connector > >>> - Audio Headphone/Line In jack connectors > >>> - S-ATA > >>> - On-board DMIC > >>> - RS485 Header > >>> - CAN bus header > >>> - SPI header > >>> - Camera Interfaces header > >>> - OnBoard RTC with Coin Backup battery socket > >>> - RS232 Debug Header (IDC10) > >>> - RS232 DTE > >>> > >>> Product Page : https://www.variscite.com/product/single-board-computers/var-mx6customboard > >>> > >>> The dts file based on the ones provided by Variscite on their own > >>> kernel, but adapted for mainline. > >>> > >>> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> > >>> Signed-off-by: James Hilliard <james.hilliard1@gmail.com> > >>> --- > >>> .../devicetree/bindings/arm/fsl.yaml | 1 + > >> > >> Please run scripts/checkpatch.pl and fix reported warnings. Some > >> warnings can be ignored, but the code here looks like it needs a fix. > >> Feel free to get in touch if the warning is not clear. > >> > >>> arch/arm/boot/dts/Makefile | 1 + > >>> .../arm/boot/dts/imx6q-var-mx6customboard.dts | 279 ++++++++++++++++++ > >>> 3 files changed, 281 insertions(+) > >>> create mode 100644 arch/arm/boot/dts/imx6q-var-mx6customboard.dts > >>> > >>> diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml > >>> index 15d411084065..0f583852de8a 100644 > >>> --- a/Documentation/devicetree/bindings/arm/fsl.yaml > >>> +++ b/Documentation/devicetree/bindings/arm/fsl.yaml > >>> @@ -298,6 +298,7 @@ properties: > >>> - udoo,imx6q-udoo # Udoo i.MX6 Quad Board > >>> - uniwest,imx6q-evi # Uniwest Evi > >>> - variscite,dt6customboard > >>> + - variscite,mx6customboard > >>> - wand,imx6q-wandboard # Wandboard i.MX6 Quad Board > >>> - ysoft,imx6q-yapp4-crux # i.MX6 Quad Y Soft IOTA Crux board > >>> - ysoft,imx6q-yapp4-pegasus # i.MX6 Quad Y Soft IOTA Pegasus board > >>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile > >>> index 59829fc90315..9cfc3d3e91ea 100644 > >>> --- a/arch/arm/boot/dts/Makefile > >>> +++ b/arch/arm/boot/dts/Makefile > >>> @@ -665,6 +665,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ > >>> imx6q-udoo.dtb \ > >>> imx6q-utilite-pro.dtb \ > >>> imx6q-var-dt6customboard.dtb \ > >>> + imx6q-var-mx6customboard.dtb \ > >>> imx6q-vicut1.dtb \ > >>> imx6q-wandboard.dtb \ > >>> imx6q-wandboard-revb1.dtb \ > >>> diff --git a/arch/arm/boot/dts/imx6q-var-mx6customboard.dts b/arch/arm/boot/dts/imx6q-var-mx6customboard.dts > >>> new file mode 100644 > >>> index 000000000000..66047dff11ec > >>> --- /dev/null > >>> +++ b/arch/arm/boot/dts/imx6q-var-mx6customboard.dts > >>> @@ -0,0 +1,279 @@ > >>> +// SPDX-License-Identifier: GPL-2.0+ > >>> +/* > >>> + * Support for Variscite MX6 Carrier-board > >>> + * > >>> + * Copyright 2016 Variscite, Ltd. All Rights Reserved > >>> + * Copyright 2022 Bootlin > >>> + */ > >>> + > >>> +/dts-v1/; > >>> + > >>> +#include "imx6qdl-var-som.dtsi" > >>> +#include <dt-bindings/pwm/pwm.h> > >>> + > >>> +/ { > >>> + model = "Variscite i.MX6 QUAD/DUAL VAR-SOM-MX6 Custom Board"; > >>> + compatible = "variscite,mx6customboard", "fsl,imx6q"; > >> > >> Where is the SoM compatible? > > > > I mostly just copied this from the DART-MX6 device tree which is > > another variscite > > imx6q based modular SoM custom board combination: > > https://github.com/torvalds/linux/blob/v6.5-rc2/arch/arm/boot/dts/nxp/imx/imx6q-var-dt6customboard.dts#L17 > > > > The terminology is a bit confusing in general here, variscite has 2 > > families of pin2pin > > modules, the "VAR-SOM" and the "DART" family. > > https://www.variscite.com/variscite-pin2pin-system-on-module-families/ > > I know, I am familiar with them. > > > > > > Within each connector family there are then multiple SoM boards that > > can be used with the same carrier boards(ie the Custom Board carrier board > > like the evaluation kit) although they are often bundled together with specific > > boards in practice. > > No, they are being shipped to the customers which then use them in their > products. Having common compatible can be useful, although it depends > what's in the common part. For example for IMX8 it was quite a lot, thus > it made sense. > > > > > So the existing DART-MX6 I think uses the same SoC but is in a different > > family and as such has a different carrier board. However as the relation > > between the SoM and the carrier board is effectively the same, I just copied > > the way compatibile is being set there for the VAR-SOM-MX6 from the > > existing DART-MX6 custom board device tree. > > > > I think this roughly represents the SoM board device tree associations as I'm > > understanding them: > > > > pin2pin Family: DART > > SoM: https://www.variscite.com/product/system-on-module-som/cortex-a9/dart-mx6-cpu-freescale-imx6/ > > SoM part: DART-MX6 > > SoM device tree: imx6qdl-var-dart.dtsi > > SoM SoC: imx6q > > Board: https://www.variscite.com/product/single-board-computers/dt6customboard/ > > Board device tree: imx6q-var-dt6customboard.dts > > Board compatible: compatible = "variscite,dt6customboard", "fsl,imx6q"; > > > > pin2pin Family: VAR-SOM > > SoM: https://www.variscite.com/product/system-on-module-som/cortex-a9/var-som-mx6-cpu-freescale-imx6/ > > SoM part: VAR-SOM-MX6 > > SoM device tree: imx6qdl-var-som.dtsi > > SoM SoC: imx6q > > Board: mx6customboard > > https://www.variscite.com/product/single-board-computers/var-mx6customboard/ > > Board device tree: imx6q-var-mx6customboard.dts > > Board compatible: compatible = "variscite,mx6customboard", "fsl,imx6q"; > > > > What's confusing here is that the DART-MX6 is also described as a SoM: > > "DART-MX6 from Variscite is the smallest System on Module (SoM) / Computer > > on Module (CoM) supporting NXP/Freescale’s i.MX6 Quad and Dual-core > > Cortex-A9™ processor" > > It is not confusing. It is a SoM. > > > > > So we have a "DART-MX6" SoM part which corresponds to the "VAR-SOM-MX6" > > SoM part, with both being SoM's but only one("VAR-SOM-MX6") having SoM in > > the actual part name. > > Vendor naming is one thing, but true meaning is second. These are > System-on-Modules. > > > > > Does the compatible section for imx6qdl-var-dart.dtsi look correct? > > > > I'm not sure what exactly a "SoM compatible" should look like here as SoM is > > both a generic term(used to describe by both the "DART-MX6" and > > "VAR-SOM-MX6" parts) as well as term used within a part(used in the > > part for "VAR-SOM-MX6" as well as other SoM's in the "VAR-SOM" family > > but not the "DART-MX6" part or other SoM's in the "DART" family). > > Take a look at IMX8 Variscite SoMs. Oh, I see what you mean now, so it looks like this is missing for the dart-mx6 device tree. imx8mm-var-som.dtsi: compatible = "variscite,var-som-mx8mm", "fsl,imx8mm"; imx8mm-var-som-symphony.dts: compatible = "variscite,var-som-mx8mm-symphony", "variscite,var-som-mx8mm", "fsl,imx8mm"; imx6q-var-dt6customboard.dts: compatible = "variscite,dt6customboard", "fsl,imx6q"; So the DART-MX6 is missing a compatible along the lines of "variscite,dart-imx6q" for the dart SoM I guess? And for VAR-SOM-MX6 I guess I should use something like "variscite,var-som-imx6q" for the SoM right? > > Best regards, > Krzysztof >
diff --git a/arch/arm/boot/dts/imx6qdl-var-som.dtsi b/arch/arm/boot/dts/imx6qdl-var-som.dtsi new file mode 100644 index 000000000000..1174515be9c0 --- /dev/null +++ b/arch/arm/boot/dts/imx6qdl-var-som.dtsi @@ -0,0 +1,539 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Support for Variscite VAR-SOM-MX6 Module + * + * Copyright 2011 Linaro Ltd. + * Copyright 2012 Freescale Semiconductor, Inc. + * Copyright (C) 2014-2016 Variscite, Ltd. + * Author: Donio Ron <ron.d@variscite.com> + * Copyright 2022 Bootlin + */ + +/dts-v1/; + +#include "imx6q.dtsi" +#include <dt-bindings/clock/imx6qdl-clock.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/sound/fsl-imx-audmux.h> + +/ { + chosen { + stdout-path = &uart1; + }; + + memory@10000000 { + device_type = "memory"; + reg = <0x10000000 0x40000000>; + }; + + reg_audio: regulator-audio { + compatible = "regulator-fixed"; + regulator-name = "tlv320aic3x-supply"; + enable-active-high; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + touch_3v3_regulator: touch_3v3_regulator { + compatible = "regulator-fixed"; + regulator-name = "touch_3v3_supply"; + regulator-always-on; + status = "okay"; + }; + + reg_wl18xx_vmmc: regulator-wl18xx { + compatible = "regulator-fixed"; + regulator-name = "vwl1807"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + startup-delay-us = <70000>; + }; + + sound: sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "var-som-audio"; + simple-audio-card,format = "i2s"; + simple-audio-card,bitclock-master = <&sound_codec>; + simple-audio-card,frame-master = <&sound_codec>; + simple-audio-card,widgets = "Headphone", "Headphone Jack", + "Line", "Line In", "Microphone", "Mic Jack"; + simple-audio-card,routing = "Headphone Jack", "HPLOUT", + "Headphone Jack", "HPROUT", + "LINE1L", "Line In", + "LINE1R", "Line In"; + + sound_cpu: simple-audio-card,cpu { + sound-dai = <&ssi2>; + }; + + sound_codec: simple-audio-card,codec { + sound-dai = <&tlv320aic3106>; + clocks = <&clks IMX6QDL_CLK_CKO>; + }; + }; + + rfkill { + compatible = "rfkill-gpio"; + name = "rfkill"; + radio-type = "bluetooth"; + shutdown-gpios = <&gpio6 18 GPIO_ACTIVE_HIGH>; + }; +}; + +&cpu0 { + operating-points = < + /* kHz uV */ + 1200000 1350000 + 996000 1250000 + 852000 1250000 + 792000 1175000 + 396000 1175000 + >; + + fsl,soc-operating-points = < + /* ARM kHz SOC-PU uV */ + 1200000 1275000 + 996000 1250000 + 852000 1250000 + 792000 1250000 + 396000 1250000 + >; +}; + +&audmux { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux>; + status = "okay"; + + mux-ssi2 { + fsl,audmux-port = <1>; + fsl,port-config = < + (IMX_AUDMUX_V2_PTCR_SYN | + IMX_AUDMUX_V2_PTCR_TFSDIR | + IMX_AUDMUX_V2_PTCR_TFSEL(2) | + IMX_AUDMUX_V2_PTCR_TCLKDIR | + IMX_AUDMUX_V2_PTCR_TCSEL(2)) + IMX_AUDMUX_V2_PDCR_RXDSEL(2) + >; + }; + + mux-aud3 { + fsl,audmux-port = <2>; + fsl,port-config = < + IMX_AUDMUX_V2_PTCR_SYN + IMX_AUDMUX_V2_PDCR_RXDSEL(1) + >; + }; +}; + +&ecspi3 { + fsl,spi-num-chipselects = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi3>; + cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "rgmii"; + phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; + fsl,magic-packet; + status = "okay"; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + pmic@8 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pmic>; + compatible = "fsl,pfuze100"; + reg = <0x08>; + + regulators { + sw1a_reg: sw1ab { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw1c_reg: sw1c { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw2_reg: sw2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3a_reg: sw3a { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3b_reg: sw3b { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + regulator-boot-on; + regulator-always-on; + }; + + sw4_reg: sw4 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + + snvs_reg: vsnvs { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + regulator-always-on; + }; + + vref_reg: vrefddr { + regulator-boot-on; + regulator-always-on; + }; + + vgen1_reg: vgen1 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + vgen2_reg: vgen2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + vgen3_reg: vgen3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + vgen4_reg: vgen4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + vgen5_reg: vgen5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + vgen6_reg: vgen6 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; + + tlv320aic3106: codec@1b { + compatible = "ti,tlv320aic3106"; + reg = <0x1b>; + #sound-dai-cells = <0>; + DRVDD-supply = <®_3p3v>; + AVDD-supply = <®_3p3v>; + IOVDD-supply = <®_3p3v>; + DVDD-supply = <®_3p3v>; + ai3x-ocmv = <0>; + reset-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; + ai3x-gpio-func = < + 0 /* AIC3X_GPIO1_FUNC_DISABLED */ + 5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */ + >; + }; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + pinctrl_hog: hoggrp { + fsl,pins = < + /* CTW6120 IRQ */ + MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x80000000 + /* SDMMC2 CD/WP */ + MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x80000000 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 + >; + }; + + pinctrl_audmux: audmux { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 + MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 + MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 + MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 + /* Audio Clock */ + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 + >; + }; + + pinctrl_bt: bt { + fsl,pins = < + /* Bluetooth/wifi enable */ + MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b1 + /* Wifi Slow Clock */ + MX6QDL_PAD_ENET_RXD0__OSC32K_32K_OUT 0x000b0 + >; + }; + + pinctrl_ecspi3: ecspi3grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 + MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 + MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 + >; + }; + + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 + >; + }; + + pinctrl_enet_irq: enetirqgrp { + fsl,pins = < + MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 + MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1 + >; + }; + + pinctrl_pmic: pmicgrp { + fsl,pins = < + /* PMIC INT */ + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 + >; + }; + + pinctrl_pwm2: pwm2grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x1b0b1 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX6QDL_PAD_SD3_DAT4__UART2_RX_DATA 0x1b0b1 + MX6QDL_PAD_SD3_DAT5__UART2_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D28__UART2_CTS_B 0x1b0b1 + MX6QDL_PAD_EIM_D29__UART2_RTS_B 0x1b0b1 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17069 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10069 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17069 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17069 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17069 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17069 + /* WL_EN */ + MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x13059 + /* WL_IRQ */ + MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x13059 + >; + }; + + pinctrl_usdhc3_100mhz: usdhc3grp100mhz { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B9 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B9 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B9 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B9 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B9 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B9 + /* WL_EN */ + MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x130B9 + /* WL_IRQ */ + MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x130B9 + >; + }; + + pinctrl_usdhc3_200mhz: usdhc3grp200mhz { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9 + /* WL_EN */ + MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x130F9 + /* WL_IRQ */ + MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x130F9 + >; + }; + + pinctrl_gpmi_nand: gpminandgrp { + fsl,pins = < + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb0b1 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 + >; + }; +}; + +&pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm2>; + status = "okay"; +}; + +®_arm { + vin-supply = <&sw1a_reg>; +}; + +®_pu { + vin-supply = <&sw1c_reg>; +}; + +®_soc { + vin-supply = <&sw1c_reg>; +}; + +&snvs_poweroff { + status = "okay"; +}; + +&ssi2 { + fsl,mode = "i2s-slave"; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2 &pinctrl_bt>; + uart-has-rtscts; + status = "okay"; +}; + +&gpmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand>; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + bus-width = <4>; + vmmc-supply = <®_wl18xx_vmmc>; + non-removable; + wakeup-source; + keep-power-in-suspend; + cap-power-off-card; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + wifi: wifi@0 { + compatible = "ti,wl1835"; + reg = <2>; + interrupt-parent = <&gpio6>; + interrupts = <17 IRQ_TYPE_EDGE_RISING>; + ref-clock-frequency = <38400000>; + }; +}; + +®_vdd1p1 { + vin-supply = <&vgen5_reg>; +}; + +®_vdd2p5 { + vin-supply = <&vgen5_reg>; +};