| Message ID | 20230620-topic-sc8280_gccgdsc-v2-3-562c1428c10d@linaro.org |
|---|---|
| State | Accepted |
| Commit | 4712eb7ff85bd3dd09c6668b8de4080e02b3eea9 |
| Headers | show |
| Series | Fix up 8280 GCC GDSCs | expand |
On Mon, Jun 26, 2023 at 07:48:08PM +0200, Konrad Dybcio wrote: > There are 10 more GDSCs that we've not been caring about, and by extension > (and perhaps even more importantly), not putting to sleep. Add them. > > Fixes: d65d005f9a6c ("clk: qcom: add sc8280xp GCC driver") > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> One nit below: Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > drivers/clk/qcom/gcc-sc8280xp.c | 100 ++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 100 insertions(+) > > diff --git a/drivers/clk/qcom/gcc-sc8280xp.c b/drivers/clk/qcom/gcc-sc8280xp.c > index 64bea886322d..3e1a62fa3a07 100644 > --- a/drivers/clk/qcom/gcc-sc8280xp.c > +++ b/drivers/clk/qcom/gcc-sc8280xp.c > @@ -6897,6 +6897,96 @@ static struct gdsc emac_1_gdsc = { > .flags = RETAIN_FF_ENABLE, > }; > > +static struct gdsc usb4_1_gdsc = { > + .gdscr = 0xb8004, > + .pd = { > + .name = "usb4_1_gdsc", > + }, > + .pwrsts = PWRSTS_OFF_ON, > + .flags = RETAIN_FF_ENABLE, > +}; > + > +static struct gdsc usb4_gdsc = { > + .gdscr = 0x2a004, > + .pd = { > + .name = "usb4_gdsc", > + }, > + .pwrsts = PWRSTS_OFF_ON, > + .flags = RETAIN_FF_ENABLE, > +}; Can we group the USB GDSCs together? - Mani > + > +static struct gdsc hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc = { > + .gdscr = 0x7d050, > + .pd = { > + .name = "hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc", > + }, > + .pwrsts = PWRSTS_OFF_ON, > + .flags = VOTABLE, > +}; > + > +static struct gdsc hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc = { > + .gdscr = 0x7d058, > + .pd = { > + .name = "hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc", > + }, > + .pwrsts = PWRSTS_OFF_ON, > + .flags = VOTABLE, > +}; > + > +static struct gdsc hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc = { > + .gdscr = 0x7d054, > + .pd = { > + .name = "hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc", > + }, > + .pwrsts = PWRSTS_OFF_ON, > + .flags = VOTABLE, > +}; > + > +static struct gdsc hlos1_vote_mmnoc_mmu_tbu_sf1_gdsc = { > + .gdscr = 0x7d06c, > + .pd = { > + .name = "hlos1_vote_mmnoc_mmu_tbu_sf1_gdsc", > + }, > + .pwrsts = PWRSTS_OFF_ON, > + .flags = VOTABLE, > +}; > + > +static struct gdsc hlos1_vote_turing_mmu_tbu0_gdsc = { > + .gdscr = 0x7d05c, > + .pd = { > + .name = "hlos1_vote_turing_mmu_tbu0_gdsc", > + }, > + .pwrsts = PWRSTS_OFF_ON, > + .flags = VOTABLE, > +}; > + > +static struct gdsc hlos1_vote_turing_mmu_tbu1_gdsc = { > + .gdscr = 0x7d060, > + .pd = { > + .name = "hlos1_vote_turing_mmu_tbu1_gdsc", > + }, > + .pwrsts = PWRSTS_OFF_ON, > + .flags = VOTABLE, > +}; > + > +static struct gdsc hlos1_vote_turing_mmu_tbu2_gdsc = { > + .gdscr = 0x7d0a0, > + .pd = { > + .name = "hlos1_vote_turing_mmu_tbu2_gdsc", > + }, > + .pwrsts = PWRSTS_OFF_ON, > + .flags = VOTABLE, > +}; > + > +static struct gdsc hlos1_vote_turing_mmu_tbu3_gdsc = { > + .gdscr = 0x7d0a4, > + .pd = { > + .name = "hlos1_vote_turing_mmu_tbu3_gdsc", > + }, > + .pwrsts = PWRSTS_OFF_ON, > + .flags = VOTABLE, > +}; > + > static struct clk_regmap *gcc_sc8280xp_clocks[] = { > [GCC_AGGRE_NOC_PCIE0_TUNNEL_AXI_CLK] = &gcc_aggre_noc_pcie0_tunnel_axi_clk.clkr, > [GCC_AGGRE_NOC_PCIE1_TUNNEL_AXI_CLK] = &gcc_aggre_noc_pcie1_tunnel_axi_clk.clkr, > @@ -7377,6 +7467,16 @@ static struct gdsc *gcc_sc8280xp_gdscs[] = { > [USB30_SEC_GDSC] = &usb30_sec_gdsc, > [EMAC_0_GDSC] = &emac_0_gdsc, > [EMAC_1_GDSC] = &emac_1_gdsc, > + [USB4_1_GDSC] = &usb4_1_gdsc, > + [USB4_GDSC] = &usb4_gdsc, > + [HLOS1_VOTE_MMNOC_MMU_TBU_HF0_GDSC] = &hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc, > + [HLOS1_VOTE_MMNOC_MMU_TBU_HF1_GDSC] = &hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc, > + [HLOS1_VOTE_MMNOC_MMU_TBU_SF0_GDSC] = &hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc, > + [HLOS1_VOTE_MMNOC_MMU_TBU_SF1_GDSC] = &hlos1_vote_mmnoc_mmu_tbu_sf1_gdsc, > + [HLOS1_VOTE_TURING_MMU_TBU0_GDSC] = &hlos1_vote_turing_mmu_tbu0_gdsc, > + [HLOS1_VOTE_TURING_MMU_TBU1_GDSC] = &hlos1_vote_turing_mmu_tbu1_gdsc, > + [HLOS1_VOTE_TURING_MMU_TBU2_GDSC] = &hlos1_vote_turing_mmu_tbu2_gdsc, > + [HLOS1_VOTE_TURING_MMU_TBU3_GDSC] = &hlos1_vote_turing_mmu_tbu3_gdsc, > }; > > static const struct clk_rcg_dfs_data gcc_dfs_clocks[] = { > > -- > 2.41.0 >
diff --git a/drivers/clk/qcom/gcc-sc8280xp.c b/drivers/clk/qcom/gcc-sc8280xp.c index 64bea886322d..3e1a62fa3a07 100644 --- a/drivers/clk/qcom/gcc-sc8280xp.c +++ b/drivers/clk/qcom/gcc-sc8280xp.c @@ -6897,6 +6897,96 @@ static struct gdsc emac_1_gdsc = { .flags = RETAIN_FF_ENABLE, }; +static struct gdsc usb4_1_gdsc = { + .gdscr = 0xb8004, + .pd = { + .name = "usb4_1_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, + .flags = RETAIN_FF_ENABLE, +}; + +static struct gdsc usb4_gdsc = { + .gdscr = 0x2a004, + .pd = { + .name = "usb4_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, + .flags = RETAIN_FF_ENABLE, +}; + +static struct gdsc hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc = { + .gdscr = 0x7d050, + .pd = { + .name = "hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, + .flags = VOTABLE, +}; + +static struct gdsc hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc = { + .gdscr = 0x7d058, + .pd = { + .name = "hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, + .flags = VOTABLE, +}; + +static struct gdsc hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc = { + .gdscr = 0x7d054, + .pd = { + .name = "hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, + .flags = VOTABLE, +}; + +static struct gdsc hlos1_vote_mmnoc_mmu_tbu_sf1_gdsc = { + .gdscr = 0x7d06c, + .pd = { + .name = "hlos1_vote_mmnoc_mmu_tbu_sf1_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, + .flags = VOTABLE, +}; + +static struct gdsc hlos1_vote_turing_mmu_tbu0_gdsc = { + .gdscr = 0x7d05c, + .pd = { + .name = "hlos1_vote_turing_mmu_tbu0_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, + .flags = VOTABLE, +}; + +static struct gdsc hlos1_vote_turing_mmu_tbu1_gdsc = { + .gdscr = 0x7d060, + .pd = { + .name = "hlos1_vote_turing_mmu_tbu1_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, + .flags = VOTABLE, +}; + +static struct gdsc hlos1_vote_turing_mmu_tbu2_gdsc = { + .gdscr = 0x7d0a0, + .pd = { + .name = "hlos1_vote_turing_mmu_tbu2_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, + .flags = VOTABLE, +}; + +static struct gdsc hlos1_vote_turing_mmu_tbu3_gdsc = { + .gdscr = 0x7d0a4, + .pd = { + .name = "hlos1_vote_turing_mmu_tbu3_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, + .flags = VOTABLE, +}; + static struct clk_regmap *gcc_sc8280xp_clocks[] = { [GCC_AGGRE_NOC_PCIE0_TUNNEL_AXI_CLK] = &gcc_aggre_noc_pcie0_tunnel_axi_clk.clkr, [GCC_AGGRE_NOC_PCIE1_TUNNEL_AXI_CLK] = &gcc_aggre_noc_pcie1_tunnel_axi_clk.clkr, @@ -7377,6 +7467,16 @@ static struct gdsc *gcc_sc8280xp_gdscs[] = { [USB30_SEC_GDSC] = &usb30_sec_gdsc, [EMAC_0_GDSC] = &emac_0_gdsc, [EMAC_1_GDSC] = &emac_1_gdsc, + [USB4_1_GDSC] = &usb4_1_gdsc, + [USB4_GDSC] = &usb4_gdsc, + [HLOS1_VOTE_MMNOC_MMU_TBU_HF0_GDSC] = &hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc, + [HLOS1_VOTE_MMNOC_MMU_TBU_HF1_GDSC] = &hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc, + [HLOS1_VOTE_MMNOC_MMU_TBU_SF0_GDSC] = &hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc, + [HLOS1_VOTE_MMNOC_MMU_TBU_SF1_GDSC] = &hlos1_vote_mmnoc_mmu_tbu_sf1_gdsc, + [HLOS1_VOTE_TURING_MMU_TBU0_GDSC] = &hlos1_vote_turing_mmu_tbu0_gdsc, + [HLOS1_VOTE_TURING_MMU_TBU1_GDSC] = &hlos1_vote_turing_mmu_tbu1_gdsc, + [HLOS1_VOTE_TURING_MMU_TBU2_GDSC] = &hlos1_vote_turing_mmu_tbu2_gdsc, + [HLOS1_VOTE_TURING_MMU_TBU3_GDSC] = &hlos1_vote_turing_mmu_tbu3_gdsc, }; static const struct clk_rcg_dfs_data gcc_dfs_clocks[] = {
There are 10 more GDSCs that we've not been caring about, and by extension (and perhaps even more importantly), not putting to sleep. Add them. Fixes: d65d005f9a6c ("clk: qcom: add sc8280xp GCC driver") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- drivers/clk/qcom/gcc-sc8280xp.c | 100 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 100 insertions(+)