| Message ID | 20230703-girdle-underling-880f633c4c73@wendy |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v3,01/11] RISC-V: Provide a more helpful error message on invalid ISA strings | expand |
On Mon, Jul 3, 2023 at 3:29 AM Conor Dooley <conor.dooley@microchip.com> wrote: > > From: Palmer Dabbelt <palmer@rivosinc.com> > > Right now we provide a somewhat unhelpful error message on systems with > invalid error messages, something along the lines of > > CPU with hartid=0 is not available > ------------[ cut here ]------------ > kernel BUG at arch/riscv/kernel/smpboot.c:174! > Kernel BUG [#1] > Modules linked in: > CPU: 0 PID: 0 Comm: swapper Not tainted 6.4.0-rc1-00096-ge0097d2c62d5-dirty #1 > Hardware name: Microchip PolarFire-SoC Icicle Kit (DT) > epc : of_parse_and_init_cpus+0x16c/0x16e > ra : of_parse_and_init_cpus+0x9a/0x16e > epc : ffffffff80c04e0a ra : ffffffff80c04d38 sp : ffffffff81603e20 > gp : ffffffff8182d658 tp : ffffffff81613f80 t0 : 000000000000006e > t1 : 0000000000000064 t2 : 0000000000000000 s0 : ffffffff81603e80 > s1 : 0000000000000000 a0 : 0000000000000000 a1 : 0000000000000000 > a2 : 0000000000000000 a3 : 0000000000000000 a4 : 0000000000000000 > a5 : 0000000000001fff a6 : 0000000000001fff a7 : ffffffff816148b0 > s2 : 0000000000000001 s3 : ffffffff81492a4c s4 : ffffffff81a4b090 > s5 : ffffffff81506030 s6 : 0000000000000040 s7 : 0000000000000000 > s8 : 00000000bfb6f046 s9 : 0000000000000001 s10: 0000000000000000 > s11: 00000000bf389700 t3 : 0000000000000000 t4 : 0000000000000000 > t5 : ffffffff824dd188 t6 : ffffffff824dd187 > status: 0000000200000100 badaddr: 0000000000000000 cause: 0000000000000003 > [<ffffffff80c04e0a>] of_parse_and_init_cpus+0x16c/0x16e > [<ffffffff80c04c96>] setup_smp+0x1e/0x26 > [<ffffffff80c03ffe>] setup_arch+0x6e/0xb2 > [<ffffffff80c00384>] start_kernel+0x72/0x400 > Code: 80e7 4a00 a603 0009 b795 1097 ffe5 80e7 92c0 9002 (9002) 715d > ---[ end trace 0000000000000000 ]--- > Kernel panic - not syncing: Fatal exception in interrupt > > Add a warning for the cases where the ISA string isn't valid. It's still > above the BUG_ON cut, but hopefully it's at least a bit easier for users. > > Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Evan Green <evan@rivosinc.com>
diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c index a2fc952318e9..3af2d214ce21 100644 --- a/arch/riscv/kernel/cpu.c +++ b/arch/riscv/kernel/cpu.c @@ -66,11 +66,15 @@ int riscv_early_of_processor_hartid(struct device_node *node, unsigned long *har return -ENODEV; } - if (IS_ENABLED(CONFIG_32BIT) && strncasecmp(isa, "rv32ima", 7)) + if (IS_ENABLED(CONFIG_32BIT) && strncasecmp(isa, "rv32ima", 7)) { + pr_warn("CPU with hartid=%lu does not support rv32ima", *hart); return -ENODEV; + } - if (IS_ENABLED(CONFIG_64BIT) && strncasecmp(isa, "rv64ima", 7)) + if (IS_ENABLED(CONFIG_64BIT) && strncasecmp(isa, "rv64ima", 7)) { + pr_warn("CPU with hartid=%lu does not support rv64ima", *hart); return -ENODEV; + } return 0; }