diff mbox series

[v2,19/22] interconnect: qcom: icc-rpm: Fix bucket number

Message ID 20230526-topic-smd_icc-v2-19-e5934b07d813@linaro.org
State New
Headers show
Series Restructure RPM SMD ICC | expand

Commit Message

Konrad Dybcio June 9, 2023, 8:19 p.m. UTC 
SMD RPM only provides two buckets, one each for the active-only and
active-sleep RPM contexts. Use the correct constant to allocate and
operate on them.

Fixes: dcbce7b0a79c ("interconnect: qcom: icc-rpm: Support multiple buckets")
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
 drivers/interconnect/qcom/icc-rpm.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

Comments

Stephan Gerhold June 10, 2023, 5:46 p.m. UTC | #1 
On Fri, Jun 09, 2023 at 10:19:24PM +0200, Konrad Dybcio wrote:
> SMD RPM only provides two buckets, one each for the active-only and
> active-sleep RPM contexts. Use the correct constant to allocate and
> operate on them.
> 
> Fixes: dcbce7b0a79c ("interconnect: qcom: icc-rpm: Support multiple buckets")
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
>  drivers/interconnect/qcom/icc-rpm.c | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c
> index 6d40815c5401..3ac47b818afe 100644
> --- a/drivers/interconnect/qcom/icc-rpm.c
> +++ b/drivers/interconnect/qcom/icc-rpm.c
> [...]
> @@ -275,7 +275,7 @@ static int qcom_icc_bw_aggregate(struct icc_node *node, u32 tag, u32 avg_bw,
>  	if (!tag)
>  		tag = QCOM_ICC_TAG_ALWAYS;
>  
> -	for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++) {
> +	for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) {
>  		if (tag & BIT(i)) {

Hm, I think QCOM_ICC_NUM_BUCKETS is actually intentional here. There is
a hint about this in the description of the commit in your Fixes line:

> This patch studies the implementation from interconnect rpmh driver to
> support multiple buckets.  The rpmh driver provides three buckets for
> AMC, WAKE, and SLEEP; this driver only needs to use WAKE and SLEEP
> buckets, but we keep the same way with rpmh driver, this can allow us
> to reuse the DT binding and avoid to define duplicated data structures.

As far as I understand, the idea was to reuse the definitions in
qcom,icc.h and just ignore the AMC bucket for now. AFAIU AMC (or rather
the lack thereof) is basically caching: Sending requests without AMC bit
set is delayed until the next rpmh_flush() call that happens when
entering a deep idle state. It requires some work but I guess
theoretically one could implement exactly the same for RPM.

What you're actually doing here is not fixing the commit but changing
the bindings. On MSM8909 I defined the ICC path for CPU<->RAM like this:

	interconnects = <&bimc MAS_APPS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
			 &bimc SLV_EBI QCOM_ICC_TAG_ACTIVE_ONLY>;

Per definition in qcom,icc.h:

	QCOM_ICC_TAG_ACTIVE_ONLY = (AMC | WAKE) = (BIT(0) | BIT(1))

Without your patch series this behaves correctly. It results in an
active-only vote.

The change of behavior is in PATCH 17/22 "interconnect: qcom: icc-rpm:
Control bus rpmcc from icc". It silently switches from
QCOM_ICC_BUCKET_WAKE (1) and QCOM_ICC_BUCKET_SLEEP (2) to
QCOM_SMD_RPM_ACTIVE_STATE (0) and QCOM_SMD_RPM_SLEEP_STATE (1).

In other words, QCOM_ICC_TAG_ACTIVE_ONLY (BIT(0) | BIT(1)) now results
in an active+sleep vote, not an active-only one. :)

There doesn't seem to be an upstream user of the ICC tags/buckets for
icc-rpm yet so personally I would be fine with changing it. However,
then qcom,icc.h should get a clear comment that it's rpmh-only and we
should define a new qcom,icc-rpm.h.

Or perhaps we should just drop this patch and continue using
QCOM_ICC_BUCKET_WAKE and QCOM_ICC_BUCKET_SLEEP as before?

Thanks,
Stephan
Konrad Dybcio June 10, 2023, 5:53 p.m. UTC | #2 
On 10.06.2023 19:46, Stephan Gerhold wrote:
> On Fri, Jun 09, 2023 at 10:19:24PM +0200, Konrad Dybcio wrote:
>> SMD RPM only provides two buckets, one each for the active-only and
>> active-sleep RPM contexts. Use the correct constant to allocate and
>> operate on them.
>>
>> Fixes: dcbce7b0a79c ("interconnect: qcom: icc-rpm: Support multiple buckets")
>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>> ---
>>  drivers/interconnect/qcom/icc-rpm.c | 14 +++++++-------
>>  1 file changed, 7 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c
>> index 6d40815c5401..3ac47b818afe 100644
>> --- a/drivers/interconnect/qcom/icc-rpm.c
>> +++ b/drivers/interconnect/qcom/icc-rpm.c
>> [...]
>> @@ -275,7 +275,7 @@ static int qcom_icc_bw_aggregate(struct icc_node *node, u32 tag, u32 avg_bw,
>>  	if (!tag)
>>  		tag = QCOM_ICC_TAG_ALWAYS;
>>  
>> -	for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++) {
>> +	for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) {
>>  		if (tag & BIT(i)) {
> 
> Hm, I think QCOM_ICC_NUM_BUCKETS is actually intentional here. There is
> a hint about this in the description of the commit in your Fixes line:
> 
>> This patch studies the implementation from interconnect rpmh driver to
>> support multiple buckets.  The rpmh driver provides three buckets for
>> AMC, WAKE, and SLEEP; this driver only needs to use WAKE and SLEEP
>> buckets, but we keep the same way with rpmh driver, this can allow us
>> to reuse the DT binding and avoid to define duplicated data structures.
> 
> As far as I understand, the idea was to reuse the definitions in
> qcom,icc.h and just ignore the AMC bucket for now. AFAIU AMC (or rather
> the lack thereof) is basically caching: Sending requests without AMC bit
> set is delayed until the next rpmh_flush() call that happens when
> entering a deep idle state. It requires some work but I guess
> theoretically one could implement exactly the same for RPM.
That's trying to shove a cube into a circle-shaped hole.. AMC is a
hardware (well, firmware.. you know what I mean) feature, which SMD
RPM lacks. Plus it'd result in useless allocations.

> 
> What you're actually doing here is not fixing the commit but changing
> the bindings. On MSM8909 I defined the ICC path for CPU<->RAM like this:
> 
> 	interconnects = <&bimc MAS_APPS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
> 			 &bimc SLV_EBI QCOM_ICC_TAG_ACTIVE_ONLY>;
> 
> Per definition in qcom,icc.h:
> 
> 	QCOM_ICC_TAG_ACTIVE_ONLY = (AMC | WAKE) = (BIT(0) | BIT(1))
> 
> Without your patch series this behaves correctly. It results in an
> active-only vote.
> 
> The change of behavior is in PATCH 17/22 "interconnect: qcom: icc-rpm:
> Control bus rpmcc from icc". It silently switches from
> QCOM_ICC_BUCKET_WAKE (1) and QCOM_ICC_BUCKET_SLEEP (2) to
> QCOM_SMD_RPM_ACTIVE_STATE (0) and QCOM_SMD_RPM_SLEEP_STATE (1).
> 
> In other words, QCOM_ICC_TAG_ACTIVE_ONLY (BIT(0) | BIT(1)) now results
> in an active+sleep vote, not an active-only one. :)
> 
> There doesn't seem to be an upstream user of the ICC tags/buckets for
> icc-rpm yet so personally I would be fine with changing it. However,
> then qcom,icc.h should get a clear comment that it's rpmh-only and we
> should define a new qcom,icc-rpm.h.
Right, I'd argue the original commit was in the wrong here. It was trying
to reuse bindings which were intended for a different hw architecture (and
perhaps not described very well - there's no word of RPMh neither in the
name nor in the defines themselves). That's an abuse in my view..

I think introducing RPM-specific bindings and communicating the change
clearly is the way to go. As you've noticed, there are no users so that
should not be problematic at all.

Konrad
> 
> Or perhaps we should just drop this patch and continue using
> QCOM_ICC_BUCKET_WAKE and QCOM_ICC_BUCKET_SLEEP as before?
> 
> Thanks,
> Stephan
diff mbox series

Patch

diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c
index 6d40815c5401..3ac47b818afe 100644
--- a/drivers/interconnect/qcom/icc-rpm.c
+++ b/drivers/interconnect/qcom/icc-rpm.c
@@ -249,7 +249,7 @@  static void qcom_icc_pre_bw_aggregate(struct icc_node *node)
 	size_t i;
 
 	qn = node->data;
-	for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++) {
+	for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) {
 		qn->sum_avg[i] = 0;
 		qn->max_peak[i] = 0;
 	}
@@ -275,7 +275,7 @@  static int qcom_icc_bw_aggregate(struct icc_node *node, u32 tag, u32 avg_bw,
 	if (!tag)
 		tag = QCOM_ICC_TAG_ALWAYS;
 
-	for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++) {
+	for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) {
 		if (tag & BIT(i)) {
 			qn->sum_avg[i] += avg_bw;
 			qn->max_peak[i] = max_t(u32, qn->max_peak[i], peak_bw);
@@ -300,11 +300,11 @@  static void qcom_icc_bus_aggregate(struct icc_provider *provider,
 {
 	struct icc_node *node;
 	struct qcom_icc_node *qn;
-	u64 sum_avg[QCOM_ICC_NUM_BUCKETS];
+	u64 sum_avg[QCOM_SMD_RPM_STATE_NUM];
 	int i;
 
 	/* Initialise aggregate values */
-	for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++) {
+	for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) {
 		agg_avg[i] = 0;
 		agg_peak[i] = 0;
 	}
@@ -317,7 +317,7 @@  static void qcom_icc_bus_aggregate(struct icc_provider *provider,
 	 */
 	list_for_each_entry(node, &provider->nodes, node_list) {
 		qn = node->data;
-		for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++) {
+		for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) {
 			if (qn->channels)
 				sum_avg[i] = div_u64(qn->sum_avg[i], qn->channels);
 			else
@@ -328,7 +328,7 @@  static void qcom_icc_bus_aggregate(struct icc_provider *provider,
 	}
 
 	/* Find maximum values across all buckets */
-	for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++)
+	for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++)
 		*max_agg_avg = max_t(u64, *max_agg_avg, agg_avg[i]);
 }
 
@@ -339,7 +339,7 @@  static int qcom_icc_set(struct icc_node *src, struct icc_node *dst)
 	struct icc_provider *provider;
 	u64 sum_bw;
 	u64 active_rate, sleep_rate;
-	u64 agg_avg[QCOM_ICC_NUM_BUCKETS], agg_peak[QCOM_ICC_NUM_BUCKETS];
+	u64 agg_avg[QCOM_SMD_RPM_STATE_NUM], agg_peak[QCOM_SMD_RPM_STATE_NUM];
 	u64 max_agg_avg;
 	int ret;