@@ -60,7 +60,7 @@
*/
#define NB_MMU_MODES 16
-#if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG)
+#if defined(CONFIG_SOFTMMU) && defined(CONFIG_TCG)
#include "exec/tlb-common.h"
/* use a fully associative victim tlb of 8 entries */
@@ -89,9 +89,9 @@
# endif
# endif
-#endif /* !CONFIG_USER_ONLY && CONFIG_TCG */
+#endif /* CONFIG_SOFTMMU && CONFIG_TCG */
-#if !defined(CONFIG_USER_ONLY)
+#if defined(CONFIG_SOFTMMU)
/*
* The full TLB entry, which is not accessed by generated TCG code,
* so the layout is not as critical as that of CPUTLBEntry. This is
@@ -133,9 +133,9 @@ typedef struct CPUTLBEntryFull {
TARGET_PAGE_ENTRY_EXTRA
#endif
} CPUTLBEntryFull;
-#endif /* !CONFIG_USER_ONLY */
+#endif /* CONFIG_SOFTMMU */
-#if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG)
+#if defined(CONFIG_SOFTMMU) && defined(CONFIG_TCG)
/*
* Data elements that are per MMU mode, minus the bits accessed by
* the TCG fast path.
@@ -201,7 +201,7 @@ typedef struct CPUTLB {
typedef struct CPUTLB { } CPUTLB;
-#endif /* !CONFIG_USER_ONLY && CONFIG_TCG */
+#endif /* CONFIG_SOFTMMU && CONFIG_TCG */
/*
* This structure must be placed in ArchCPU immediately
We want to check the softmmu tlb availability, not if we are targetting system emulation. Besides, this code could be used by user emulation in the future. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- Based-on: <20230605222420.14776-1-philmd@linaro.org> See also https://lore.kernel.org/qemu-devel/7913570a-8bf6-2ac9-6869-fab87273742c@linaro.org/ --- include/exec/cpu-defs.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)