Message ID | 20230523135733.3852-3-quic_kbajaj@quicinc.com |
---|---|
State | Superseded |
Headers | show |
Series | arm64: dts: qcom: qdu1000: add SDHCI | expand |
On 5/25/2023 9:57 AM, Bjorn Andersson wrote: > On Tue, May 23, 2023 at 07:27:31PM +0530, Komal Bajaj wrote: >> Add sdhc node for eMMC on QDU1000 and QRU1000 SoCs. >> > Please fix your $subject prefix, it should say arm64 > > Regards, > Bjorn Noted. >> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/qdu1000.dtsi | 47 +++++++++++++++++++++++++++ >> 1 file changed, 47 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi >> index 734438113bba..6df07334f1d3 100644 >> --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi >> +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi >> @@ -842,6 +842,53 @@ >> #hwlock-cells = <1>; >> }; >> >> + sdhc: mmc@8804000 { >> + compatible = "qcom,qdu1000-sdhci", "qcom,sdhci-msm-v5"; >> + reg = <0x0 0x08804000 0x0 0x1000>, >> + <0x0 0x08805000 0x0 0x1000>; >> + reg-names = "hc", "cqhci"; >> + >> + interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, >> + <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>; >> + interrupt-names = "hc_irq", "pwr_irq"; >> + >> + clocks = <&gcc GCC_SDCC5_AHB_CLK>, >> + <&gcc GCC_SDCC5_APPS_CLK>, >> + <&rpmhcc RPMH_CXO_CLK>; >> + clock-names = "iface", >> + "core", >> + "xo"; >> + >> + resets = <&gcc GCC_SDCC5_BCR>; >> + >> + interconnects = <&system_noc MASTER_SDCC_1 0 &mc_virt SLAVE_EBI1 0>, >> + <&gem_noc MASTER_APPSS_PROC 0 &system_noc SLAVE_SDCC_2 0>; >> + interconnect-names = "sdhc-ddr", "cpu-sdhc"; >> + power-domains = <&rpmhpd QDU1000_CX>; >> + operating-points-v2 = <&sdhc1_opp_table>; >> + >> + iommus = <&apps_smmu 0x80 0x0>; >> + dma-coherent; >> + >> + bus-width = <8>; >> + >> + qcom,dll-config = <0x0007642c>; >> + qcom,ddr-config = <0x80040868>; >> + >> + status = "disabled"; >> + >> + sdhc1_opp_table: opp-table { >> + compatible = "operating-points-v2"; >> + >> + opp-384000000 { >> + opp-hz = /bits/ 64 <384000000>; >> + required-opps = <&rpmhpd_opp_nom>; >> + opp-peak-kBps = <6528000 1652800>; >> + opp-avg-kBps = <400000 0>; >> + }; >> + }; >> + }; >> + >> pdc: interrupt-controller@b220000 { >> compatible = "qcom,qdu1000-pdc", "qcom,pdc"; >> reg = <0x0 0xb220000 0x0 0x30000>, <0x0 0x174000f0 0x0 0x64>; >> -- >> 2.17.1 >>
diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi index 734438113bba..6df07334f1d3 100644 --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi @@ -842,6 +842,53 @@ #hwlock-cells = <1>; }; + sdhc: mmc@8804000 { + compatible = "qcom,qdu1000-sdhci", "qcom,sdhci-msm-v5"; + reg = <0x0 0x08804000 0x0 0x1000>, + <0x0 0x08805000 0x0 0x1000>; + reg-names = "hc", "cqhci"; + + interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "hc_irq", "pwr_irq"; + + clocks = <&gcc GCC_SDCC5_AHB_CLK>, + <&gcc GCC_SDCC5_APPS_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "iface", + "core", + "xo"; + + resets = <&gcc GCC_SDCC5_BCR>; + + interconnects = <&system_noc MASTER_SDCC_1 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &system_noc SLAVE_SDCC_2 0>; + interconnect-names = "sdhc-ddr", "cpu-sdhc"; + power-domains = <&rpmhpd QDU1000_CX>; + operating-points-v2 = <&sdhc1_opp_table>; + + iommus = <&apps_smmu 0x80 0x0>; + dma-coherent; + + bus-width = <8>; + + qcom,dll-config = <0x0007642c>; + qcom,ddr-config = <0x80040868>; + + status = "disabled"; + + sdhc1_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-384000000 { + opp-hz = /bits/ 64 <384000000>; + required-opps = <&rpmhpd_opp_nom>; + opp-peak-kBps = <6528000 1652800>; + opp-avg-kBps = <400000 0>; + }; + }; + }; + pdc: interrupt-controller@b220000 { compatible = "qcom,qdu1000-pdc", "qcom,pdc"; reg = <0x0 0xb220000 0x0 0x30000>, <0x0 0x174000f0 0x0 0x64>;
Add sdhc node for eMMC on QDU1000 and QRU1000 SoCs. Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> --- arch/arm64/boot/dts/qcom/qdu1000.dtsi | 47 +++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) -- 2.17.1