| Message ID | 20230511150539.5.Ie7e600278ffbed55a1e5a58178203787b1449b35@changeid |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [1/6] dt-bindings: interrupt-controller: arm,gic-v3: Add quirk for Mediatek SoCs w/ broken FW | expand |
Reviewed-by: Julius Werner <jwerner@chromium.org>
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 5c30caf74026..8931c59c69f4 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -412,6 +412,7 @@ gic: interrupt-controller@c000000 { reg = <0 0x0c000000 0 0x40000>, <0 0x0c040000 0 0x200000>; interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>; + mediatek,gicr-save-quirk; ppi-partitions { ppi_cluster0: interrupt-partition-0 {
Firmware shipped on mt8192 Chromebooks is affected by the GICR save/restore issue as described by the patch ("dt-bindings: interrupt-controller: arm,gic-v3: Add quirk for Mediatek SoCs w/ broken FW"). Add the quirk property. Fixes: 48489980e27e ("arm64: dts: Add Mediatek SoC MT8192 and evaluation board dts and Makefile") Signed-off-by: Douglas Anderson <dianders@chromium.org> --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 1 + 1 file changed, 1 insertion(+)