| Message ID | 20230511104919.875195-1-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
On 5/11/23 11:49, Richard Henderson wrote: > v2: Remove poisoned symbol CONFIG_RISCV_DIS from disas.c. > Wasn't visible from x86 with gcc or clang; > was visible from macos clang; > was visible from native riscv clang. > > > r~ > > > The following changes since commit fff86d48a2cdcdfa75f845cac3e0d3cdd848d9e4: > > Merge tag 'migration-20230509-pull-request' ofhttps://gitlab.com/juan.quintela/qemu into staging (2023-05-11 05:55:12 +0100) > > are available in the Git repository at: > > https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20230511-2 > > for you to fetch changes up to 335dfd253fc242b009a1b9b5d4fffbf4ea52928d: > > target/loongarch: Do not include tcg-ldst.h (2023-05-11 09:53:41 +0100) > > ---------------------------------------------------------------- > target/m68k: Fix gen_load_fp regression > accel/tcg: Ensure fairness with icount > disas: Move disas.c into the target-independent source sets > tcg: Use common routines for calling slow path helpers > tcg/*: Cleanups to qemu_ld/st constraints > tcg: Remove TARGET_ALIGNED_ONLY > accel/tcg: Reorg system mode load/store helpers Applied, thanks. Please update https://wiki.qemu.org/ChangeLog/8.1 as appropriate. r~
v2: Remove poisoned symbol CONFIG_RISCV_DIS from disas.c. Wasn't visible from x86 with gcc or clang; was visible from macos clang; was visible from native riscv clang. r~ The following changes since commit fff86d48a2cdcdfa75f845cac3e0d3cdd848d9e4: Merge tag 'migration-20230509-pull-request' of https://gitlab.com/juan.quintela/qemu into staging (2023-05-11 05:55:12 +0100) are available in the Git repository at: https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20230511-2 for you to fetch changes up to 335dfd253fc242b009a1b9b5d4fffbf4ea52928d: target/loongarch: Do not include tcg-ldst.h (2023-05-11 09:53:41 +0100) ---------------------------------------------------------------- target/m68k: Fix gen_load_fp regression accel/tcg: Ensure fairness with icount disas: Move disas.c into the target-independent source sets tcg: Use common routines for calling slow path helpers tcg/*: Cleanups to qemu_ld/st constraints tcg: Remove TARGET_ALIGNED_ONLY accel/tcg: Reorg system mode load/store helpers ---------------------------------------------------------------- Jamie Iles (2): cpu: expose qemu_cpu_list_lock for lock-guard use accel/tcg/tcg-accel-ops-rr: ensure fairness with icount Richard Henderson (49): target/m68k: Fix gen_load_fp for OS_LONG accel/tcg: Fix atomic_mmu_lookup for reads disas: Fix tabs and braces in disas.c disas: Move disas.c to disas/ disas: Remove target_ulong from the interface disas: Remove target-specific headers tcg/i386: Introduce prepare_host_addr tcg/i386: Use indexed addressing for softmmu fast path tcg/aarch64: Introduce prepare_host_addr tcg/arm: Introduce prepare_host_addr tcg/loongarch64: Introduce prepare_host_addr tcg/mips: Introduce prepare_host_addr tcg/ppc: Introduce prepare_host_addr tcg/riscv: Introduce prepare_host_addr tcg/s390x: Introduce prepare_host_addr tcg: Add routines for calling slow-path helpers tcg/i386: Convert tcg_out_qemu_ld_slow_path tcg/i386: Convert tcg_out_qemu_st_slow_path tcg/aarch64: Convert tcg_out_qemu_{ld,st}_slow_path tcg/arm: Convert tcg_out_qemu_{ld,st}_slow_path tcg/loongarch64: Convert tcg_out_qemu_{ld,st}_slow_path tcg/mips: Convert tcg_out_qemu_{ld,st}_slow_path tcg/ppc: Convert tcg_out_qemu_{ld,st}_slow_path tcg/riscv: Convert tcg_out_qemu_{ld,st}_slow_path tcg/s390x: Convert tcg_out_qemu_{ld,st}_slow_path tcg/loongarch64: Simplify constraints on qemu_ld/st tcg/mips: Remove MO_BSWAP handling tcg/mips: Reorg tlb load within prepare_host_addr tcg/mips: Simplify constraints on qemu_ld/st tcg/ppc: Reorg tcg_out_tlb_read tcg/ppc: Adjust constraints on qemu_ld/st tcg/ppc: Remove unused constraints A, B, C, D tcg/ppc: Remove unused constraint J tcg/riscv: Simplify constraints on qemu_ld/st tcg/s390x: Use ALGFR in constructing softmmu host address tcg/s390x: Simplify constraints on qemu_ld/st target/mips: Add MO_ALIGN to gen_llwp, gen_scwp target/mips: Add missing default_tcg_memop_mask target/mips: Use MO_ALIGN instead of 0 target/mips: Remove TARGET_ALIGNED_ONLY target/nios2: Remove TARGET_ALIGNED_ONLY target/sh4: Use MO_ALIGN where required target/sh4: Remove TARGET_ALIGNED_ONLY tcg: Remove TARGET_ALIGNED_ONLY accel/tcg: Add cpu_in_serial_context accel/tcg: Introduce tlb_read_idx accel/tcg: Reorg system mode load helpers accel/tcg: Reorg system mode store helpers target/loongarch: Do not include tcg-ldst.h Thomas Huth (2): disas: Move softmmu specific code to separate file disas: Move disas.c into the target-independent source set configs/targets/mips-linux-user.mak | 1 - configs/targets/mips-softmmu.mak | 1 - configs/targets/mips64-linux-user.mak | 1 - configs/targets/mips64-softmmu.mak | 1 - configs/targets/mips64el-linux-user.mak | 1 - configs/targets/mips64el-softmmu.mak | 1 - configs/targets/mipsel-linux-user.mak | 1 - configs/targets/mipsel-softmmu.mak | 1 - configs/targets/mipsn32-linux-user.mak | 1 - configs/targets/mipsn32el-linux-user.mak | 1 - configs/targets/nios2-softmmu.mak | 1 - configs/targets/sh4-linux-user.mak | 1 - configs/targets/sh4-softmmu.mak | 1 - configs/targets/sh4eb-linux-user.mak | 1 - configs/targets/sh4eb-softmmu.mak | 1 - meson.build | 3 - accel/tcg/internal.h | 9 + accel/tcg/tcg-accel-ops-icount.h | 3 +- disas/disas-internal.h | 21 + include/disas/disas.h | 23 +- include/exec/cpu-common.h | 1 + include/exec/cpu-defs.h | 7 +- include/exec/cpu_ldst.h | 26 +- include/exec/memop.h | 13 +- include/exec/poison.h | 1 - tcg/loongarch64/tcg-target-con-set.h | 2 - tcg/loongarch64/tcg-target-con-str.h | 1 - tcg/mips/tcg-target-con-set.h | 13 +- tcg/mips/tcg-target-con-str.h | 2 - tcg/mips/tcg-target.h | 4 +- tcg/ppc/tcg-target-con-set.h | 11 +- tcg/ppc/tcg-target-con-str.h | 7 - tcg/riscv/tcg-target-con-set.h | 2 - tcg/riscv/tcg-target-con-str.h | 1 - tcg/s390x/tcg-target-con-set.h | 2 - tcg/s390x/tcg-target-con-str.h | 1 - accel/tcg/cpu-exec-common.c | 3 + accel/tcg/cputlb.c | 1113 ++++++++++++++++------------- accel/tcg/tb-maint.c | 2 +- accel/tcg/tcg-accel-ops-icount.c | 21 +- accel/tcg/tcg-accel-ops-rr.c | 37 +- bsd-user/elfload.c | 5 +- cpus-common.c | 2 +- disas/disas-mon.c | 65 ++ disas.c => disas/disas.c | 111 +-- linux-user/elfload.c | 18 +- migration/dirtyrate.c | 26 +- replay/replay.c | 3 +- target/loongarch/csr_helper.c | 1 - target/loongarch/iocsr_helper.c | 1 - target/m68k/translate.c | 1 + target/mips/tcg/mxu_translate.c | 3 +- target/nios2/translate.c | 10 + target/sh4/translate.c | 102 ++- tcg/tcg.c | 480 ++++++++++++- trace/control-target.c | 9 +- target/mips/tcg/micromips_translate.c.inc | 24 +- target/mips/tcg/mips16e_translate.c.inc | 18 +- target/mips/tcg/nanomips_translate.c.inc | 32 +- tcg/aarch64/tcg-target.c.inc | 347 ++++----- tcg/arm/tcg-target.c.inc | 455 +++++------- tcg/i386/tcg-target.c.inc | 453 +++++------- tcg/loongarch64/tcg-target.c.inc | 313 +++----- tcg/mips/tcg-target.c.inc | 870 +++++++--------------- tcg/ppc/tcg-target.c.inc | 512 ++++++------- tcg/riscv/tcg-target.c.inc | 304 ++++---- tcg/s390x/tcg-target.c.inc | 314 ++++---- disas/meson.build | 6 +- 68 files changed, 2789 insertions(+), 3040 deletions(-) create mode 100644 disas/disas-internal.h create mode 100644 disas/disas-mon.c rename disas.c => disas/disas.c (78%)