| Message ID | 20230413100429.919622-14-bingbu.cao@intel.com |
|---|---|
| State | New |
| Headers | show |
| Series | Intel IPU6 and IPU6 input system drivers | expand |
Hi Bingbu, Thank you for the patch. On Thu, Apr 13, 2023 at 06:04:28PM +0800, bingbu.cao@intel.com wrote: > From: Bingbu Cao <bingbu.cao@intel.com> > > This document mainly describe the functionality of IPU6 and > IPU6 isys driver, and gives an example that how user can do > imaging capture with tools. > > Signed-off-by: Bingbu Cao <bingbu.cao@intel.com> > --- > Documentation/admin-guide/media/ipu6-isys.rst | 128 +++++++ > .../admin-guide/media/ipu6_isys_graph.svg | 338 ++++++++++++++++++ > .../admin-guide/media/v4l-drivers.rst | 1 + > 3 files changed, 467 insertions(+) > create mode 100644 Documentation/admin-guide/media/ipu6-isys.rst > create mode 100644 Documentation/admin-guide/media/ipu6_isys_graph.svg > > diff --git a/Documentation/admin-guide/media/ipu6-isys.rst b/Documentation/admin-guide/media/ipu6-isys.rst > new file mode 100644 > index 000000000000..083b00449b86 > --- /dev/null > +++ b/Documentation/admin-guide/media/ipu6-isys.rst > @@ -0,0 +1,128 @@ > +.. SPDX-License-Identifier: GPL-2.0 > + > +.. include:: <isonum.txt> > + > +=============================================================== > +Intel Image Processing Unit 6 (IPU6) Input System driver > +=============================================================== > + > +Copyright |copy| 2023 Intel Corporation > + > +Introduction > +============ > + > +This file documents the Intel IPU6 (6th generation Image Processing Unit) > +Input System (MIPI CSI2 receiver) drivers located under > +drivers/media/pci/intel/ipu6. > + > + > +The Intel IPU6 can be found in certain Intel Chipsets but not in all SKUs: > + > +* TigerLake > +* JasperLake > +* AlderLake > +* RaptorLake > +* MeteorLake > + > +Intel IPU6 is made up of two components - Input System (ISYS) and Processing > +System (PSYS). > + > +The Input System mainly work as MIPI CSI2 receiver which receive and process the s/work/works/ s/receive/receives/ s/process/processes/ > +imaging data from the sensors and outputs the frames to memory. > + > +There are 2 driver modules - intel_ipu6 and intel_ipu6_isys. intel_ipu6 is IPU6 s/is IPU6/is an IPU6/ > +common driver which does PCI configuration, firmware loading and parsing, > +firmware authentication, DMA mapping and IPU-MMU (internal Memory mapping Unit) > +configuration. intel_ipu6_isys implements V4L2, Media Controller and V4L2 > +sub-device interfaces. The IPU6 ISYS driver supports camera sensors connected > +to the IPU6 ISYS through V4L2 sub-device sensor drivers. Will the intel_ipu6 driver also serve a future intel_ipu6_psys driver, or is it specific to the ISYS ? > + > +Input system driver > +=================== > + > +Input System driver mainly configure CSI2 DPHY, construct the firmware stream s/^Input/The Input/ s/configure/configures the/ s/construct/constructs/ > +configuration and send commands to firmware and get response from hardware and s/send/sends/ s/get response/gets responses/ > +firmware and then return buffers to user. s/return/returns/ So control of the ISYS goes through the firmware, the driver doesn't access the hardware directly ? > +The ISYS is represented as several V4L2 sub-devices - 'Intel IPU6 CSI2 $port', > +which provide V4L2 subdev interfaces to the user space, there are also several > +video nodes for each CSI-2 stream capture - 'Intel IPU6 ISYS capture $num' which > +provide interface to user to set formats, queue buffers and streaming. > + > +.. kernel-figure:: ipu6_isys_graph.svg > + :alt: ipu6 isys media graph I see in the figure 6 CSI-2 receivers and 4 video nodes. Are those CSI-2 receivers independent of each other, or do they share SoCs pins ? For instance, I'm thinking about a use case where you would have 4 data lanes and 2 clock lanes, and support capturing from 2x 2-lanes sensors with 2 CSI-2 RX, or 1x 4-lanes sensor with 1 CSI-2 RX. More generally, can you document the input options of the ISYS ? For DT-based systems I'd expect this information to be in the DT bindings, here it needs to be documented separately. On the video device node side, are there 4 independent hardware DMA engines that can be dynamically connected to the different CSI-2 receivers, or is that what the current firmware version provide, with the hardware able to capture more than 4 streams with firmware modifications ? > + > +Capturing frames by IPU6 ISYS > +------------------------------------ > + > +IPU6 ISYS is used to capture frames from the camera sensors connected to the > +CSI2 port. The supported input formats of ISYS are listed in table below: s/port/ports/ > + > +.. tabularcolumns:: |p{0.8cm}|p{4.0cm}|p{4.0cm}| > + > +.. flat-table:: > + :header-rows: 1 > + > + * - IPU6 ISYS supported input formats > + > + * - RGB565, RGB888 > + > + * - UYVY8, YUYV8 Unless I'm mistaken, CSI-2 doesn't have separate UYVY and YUYV formats. Am I missing something ? > + > + * - RAW8, RAW10, RAW12 Is embedded data capture supported ? More generically, can we capture different data types and/or virtual channels from the same CSI-2 input ? What's the maximum resolution supported by the ISYS ? Are the DMA engines independent, or would the maximum resolution be different if you capture from a single camera sensor or multiple camera sensors at the same time ? > + > +Here is an example of IPU6 ISYS raw capture on Dell XPS 9315 laptop. On this > +machine, ov01a10 sensor is connected to IPU ISYS CSI2 port 2, which can > +generate images at sBGGR10 with resolution 1280x800. > + > +Using the media controller APIs, we can configure ov01a10 sensor by > +media-ctl [#f1]_ and yavta [#f2]_ to transmit frames to IPU6 ISYS. > + > +.. code-block:: none > + > + # This example assumes /dev/media0 as the IPU ISYS media device > + export MDEV=/dev/media0 > + > + # Establish the link for the media devices using media-ctl > + media-ctl -d $MDEV -l "\"ov01a10 3-0036\":0 -> \"Intel IPU6 CSI2 2\":0[1]" > + > + # Set the format for the media devices > + media-ctl -d $MDEV -V "ov01a10:0 [fmt:SBGGR10/1280x800]" > + media-ctl -d $MDEV -V "Intel IPU6 CSI2 2:0 [fmt:SBGGR10/1280x800]" > + media-ctl -d $MDEV -V "Intel IPU6 CSI2 2:1 [fmt:SBGGR10/1280x800]" > + > + # Establish the link for the media devices using media-ctl > + media-ctl -d $MDEV -l "\"ov01a10 3-0036\":0 -> \"Intel IPU6 CSI2 2\":0[1]" > + media-ctl -d $MDEV -l "\"Intel IPU6 CSI2 2\":1 ->\"Intel IPU6 ISYS Capture 0\":0[5]" > + > +Once the media pipeline is configured, desired sensor specific settings > +(such as exposure and gain settings) can be set, using the yavta tool. > + > +e.g > + > +.. code-block:: none > + > + # and that ov01a10 sensor is connected to i2c bus 3 with address 0x36 > + export SDEV=$(media-ctl -d $MDEV -e "ov01a10 3-0036") > + > + yavta -w 0x009e0903 400 $SDEV > + yavta -w 0x009e0913 1000 $SDEV > + yavta -w 0x009e0911 2000 $SDEV > + > +Once the desired sensor settings are set, frame captures can be done as below. > + > +e.g > + > +.. code-block:: none > + > + yavta --data-prefix -u -c10 -n5 -I -s 1280x800 --file=/tmp/frame-#.bin \ > + -f SBGGR10 $(media-ctl -d $MDEV -e "Intel IPU6 ISYS Capture 0") > + > +With the above command, 10 frames are captured at 1280x800 resolution with > +sBGGR10 format. The captured frames are available as /tmp/frame-#.bin files. > + > + > +References > +========== > + > +.. [#f1] https://git.ideasonboard.org/?p=media-ctl.git;a=summary > +.. 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> --- a/Documentation/admin-guide/media/v4l-drivers.rst > +++ b/Documentation/admin-guide/media/v4l-drivers.rst > @@ -16,6 +16,7 @@ Video4Linux (V4L) driver-specific documentation > imx > imx7 > ipu3 > + ipu6-isys > ivtv > omap3isp > omap4_camera
Hi Laurent, On Thu, Apr 20, 2023 at 05:49:17PM +0300, Laurent Pinchart wrote: ... > > +common driver which does PCI configuration, firmware loading and parsing, > > +firmware authentication, DMA mapping and IPU-MMU (internal Memory mapping Unit) > > +configuration. intel_ipu6_isys implements V4L2, Media Controller and V4L2 > > +sub-device interfaces. The IPU6 ISYS driver supports camera sensors connected > > +to the IPU6 ISYS through V4L2 sub-device sensor drivers. > > Will the intel_ipu6 driver also serve a future intel_ipu6_psys driver, > or is it specific to the ISYS ? intel-ipu6 contains common parts required by both ISYS and PSYS drivers. > > > + > > +Input system driver > > +=================== > > + > > +Input System driver mainly configure CSI2 DPHY, construct the firmware stream > > s/^Input/The Input/ > s/configure/configures the/ > s/construct/constructs/ > > > +configuration and send commands to firmware and get response from hardware and > > s/send/sends/ > s/get response/gets responses/ > > > +firmware and then return buffers to user. > > s/return/returns/ > > So control of the ISYS goes through the firmware, the driver doesn't > access the hardware directly ? Must of the low-level hardware control takes place through firmware, the ISYS driver uses direct register access mainly for the communication with the ISYS firmware and PHY configuration. > > > +The ISYS is represented as several V4L2 sub-devices - 'Intel IPU6 CSI2 $port', > > +which provide V4L2 subdev interfaces to the user space, there are also several > > +video nodes for each CSI-2 stream capture - 'Intel IPU6 ISYS capture $num' which > > +provide interface to user to set formats, queue buffers and streaming. > > + > > +.. kernel-figure:: ipu6_isys_graph.svg > > + :alt: ipu6 isys media graph > > I see in the figure 6 CSI-2 receivers and 4 video nodes. Are those CSI-2 > receivers independent of each other, or do they share SoCs pins ? For > instance, I'm thinking about a use case where you would have 4 data > lanes and 2 clock lanes, and support capturing from 2x 2-lanes sensors > with 2 CSI-2 RX, or 1x 4-lanes sensor with 1 CSI-2 RX. More generally, > can you document the input options of the ISYS ? For DT-based systems > I'd expect this information to be in the DT bindings, here it needs to > be documented separately. This is a to-do item (as noted on the cover page). The number of video nodes is also going to change with streams support. > > On the video device node side, are there 4 independent hardware DMA > engines that can be dynamically connected to the different CSI-2 > receivers, or is that what the current firmware version provide, with > the hardware able to capture more than 4 streams with firmware > modifications ? > > > + > > +Capturing frames by IPU6 ISYS > > +------------------------------------ > > + > > +IPU6 ISYS is used to capture frames from the camera sensors connected to the > > +CSI2 port. The supported input formats of ISYS are listed in table below: > > s/port/ports/ > > > + > > +.. tabularcolumns:: |p{0.8cm}|p{4.0cm}|p{4.0cm}| > > + > > +.. flat-table:: > > + :header-rows: 1 > > + > > + * - IPU6 ISYS supported input formats > > + > > + * - RGB565, RGB888 > > + > > + * - UYVY8, YUYV8 > > Unless I'm mistaken, CSI-2 doesn't have separate UYVY and YUYV formats. > Am I missing something ? > > > + > > + * - RAW8, RAW10, RAW12 > > Is embedded data capture supported ? More generically, can we capture > different data types and/or virtual channels from the same CSI-2 input ? Yes but not quite yet (streams support is pending). > > What's the maximum resolution supported by the ISYS ? Are the DMA > engines independent, or would the maximum resolution be different if you > capture from a single camera sensor or multiple camera sensors at the > same time ? My understanding is they're independent, i.e. the maximum resolution isn't affected by what else is happening in the device.
diff --git a/Documentation/admin-guide/media/ipu6-isys.rst b/Documentation/admin-guide/media/ipu6-isys.rst new file mode 100644 index 000000000000..083b00449b86 --- /dev/null +++ b/Documentation/admin-guide/media/ipu6-isys.rst @@ -0,0 +1,128 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. include:: <isonum.txt> + +=============================================================== +Intel Image Processing Unit 6 (IPU6) Input System driver +=============================================================== + +Copyright |copy| 2023 Intel Corporation + +Introduction +============ + +This file documents the Intel IPU6 (6th generation Image Processing Unit) +Input System (MIPI CSI2 receiver) drivers located under +drivers/media/pci/intel/ipu6. + + +The Intel IPU6 can be found in certain Intel Chipsets but not in all SKUs: + +* TigerLake +* JasperLake +* AlderLake +* RaptorLake +* MeteorLake + +Intel IPU6 is made up of two components - Input System (ISYS) and Processing +System (PSYS). + +The Input System mainly work as MIPI CSI2 receiver which receive and process the +imaging data from the sensors and outputs the frames to memory. + +There are 2 driver modules - intel_ipu6 and intel_ipu6_isys. intel_ipu6 is IPU6 +common driver which does PCI configuration, firmware loading and parsing, +firmware authentication, DMA mapping and IPU-MMU (internal Memory mapping Unit) +configuration. intel_ipu6_isys implements V4L2, Media Controller and V4L2 +sub-device interfaces. The IPU6 ISYS driver supports camera sensors connected +to the IPU6 ISYS through V4L2 sub-device sensor drivers. + +Input system driver +=================== + +Input System driver mainly configure CSI2 DPHY, construct the firmware stream +configuration and send commands to firmware and get response from hardware and +firmware and then return buffers to user. +The ISYS is represented as several V4L2 sub-devices - 'Intel IPU6 CSI2 $port', +which provide V4L2 subdev interfaces to the user space, there are also several +video nodes for each CSI-2 stream capture - 'Intel IPU6 ISYS capture $num' which +provide interface to user to set formats, queue buffers and streaming. + +.. kernel-figure:: ipu6_isys_graph.svg + :alt: ipu6 isys media graph + +Capturing frames by IPU6 ISYS +------------------------------------ + +IPU6 ISYS is used to capture frames from the camera sensors connected to the +CSI2 port. The supported input formats of ISYS are listed in table below: + +.. tabularcolumns:: |p{0.8cm}|p{4.0cm}|p{4.0cm}| + +.. flat-table:: + :header-rows: 1 + + * - IPU6 ISYS supported input formats + + * - RGB565, RGB888 + + * - UYVY8, YUYV8 + + * - RAW8, RAW10, RAW12 + +Here is an example of IPU6 ISYS raw capture on Dell XPS 9315 laptop. On this +machine, ov01a10 sensor is connected to IPU ISYS CSI2 port 2, which can +generate images at sBGGR10 with resolution 1280x800. + +Using the media controller APIs, we can configure ov01a10 sensor by +media-ctl [#f1]_ and yavta [#f2]_ to transmit frames to IPU6 ISYS. + +.. code-block:: none + + # This example assumes /dev/media0 as the IPU ISYS media device + export MDEV=/dev/media0 + + # Establish the link for the media devices using media-ctl + media-ctl -d $MDEV -l "\"ov01a10 3-0036\":0 -> \"Intel IPU6 CSI2 2\":0[1]" + + # Set the format for the media devices + media-ctl -d $MDEV -V "ov01a10:0 [fmt:SBGGR10/1280x800]" + media-ctl -d $MDEV -V "Intel IPU6 CSI2 2:0 [fmt:SBGGR10/1280x800]" + media-ctl -d $MDEV -V "Intel IPU6 CSI2 2:1 [fmt:SBGGR10/1280x800]" + + # Establish the link for the media devices using media-ctl + media-ctl -d $MDEV -l "\"ov01a10 3-0036\":0 -> \"Intel IPU6 CSI2 2\":0[1]" + media-ctl -d $MDEV -l "\"Intel IPU6 CSI2 2\":1 ->\"Intel IPU6 ISYS Capture 0\":0[5]" + +Once the media pipeline is configured, desired sensor specific settings +(such as exposure and gain settings) can be set, using the yavta tool. + +e.g + +.. code-block:: none + + # and that ov01a10 sensor is connected to i2c bus 3 with address 0x36 + export SDEV=$(media-ctl -d $MDEV -e "ov01a10 3-0036") + + yavta -w 0x009e0903 400 $SDEV + yavta -w 0x009e0913 1000 $SDEV + yavta -w 0x009e0911 2000 $SDEV + +Once the desired sensor settings are set, frame captures can be done as below. + +e.g + +.. code-block:: none + + yavta --data-prefix -u -c10 -n5 -I -s 1280x800 --file=/tmp/frame-#.bin \ + -f SBGGR10 $(media-ctl -d $MDEV -e "Intel IPU6 ISYS Capture 0") + +With the above command, 10 frames are captured at 1280x800 resolution with +sBGGR10 format. The captured frames are available as /tmp/frame-#.bin files. + + +References +========== + +.. [#f1] https://git.ideasonboard.org/?p=media-ctl.git;a=summary +.. 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