| Message ID | 20230416123730.300863-1-krzysztof.kozlowski@linaro.org |
|---|---|
| State | Accepted |
| Commit | b8420d478aa3fc739fcdba6b4b945850b356cb3b |
| Headers | show |
| Series | [1/6] arm64: dts: qcom: ipq6018: drop incorrect SPI bus spi-max-frequency | expand |
On 16.04.2023 14:37, Krzysztof Kozlowski wrote: > The spi-max-frequency property belongs to SPI devices, not SPI > controller: > > ipq6018-cp01-c1.dtb: spi@78b5000: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected) > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi > index f531797f2619..54af7cb3c7a8 100644 > --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi > +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi > @@ -441,7 +441,6 @@ blsp1_spi1: spi@78b5000 { > #size-cells = <0>; > reg = <0x0 0x078b5000 0x0 0x600>; > interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; > - spi-max-frequency = <50000000>; > clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>, > <&gcc GCC_BLSP1_AHB_CLK>; > clock-names = "core", "iface"; > @@ -456,7 +455,6 @@ blsp1_spi2: spi@78b6000 { > #size-cells = <0>; > reg = <0x0 0x078b6000 0x0 0x600>; > interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; > - spi-max-frequency = <50000000>; > clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>, > <&gcc GCC_BLSP1_AHB_CLK>; > clock-names = "core", "iface";
On 16.04.2023 14:37, Krzysztof Kozlowski wrote: > The spi-max-frequency property belongs to SPI devices, not SPI > controller: > > ipq8074-hk01.dtb: spi@78b5000: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected) > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > arch/arm64/boot/dts/qcom/ipq8074.dtsi | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi > index 5b2c1986c8f4..3b801c4d7eb3 100644 > --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi > +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi > @@ -476,7 +476,6 @@ blsp1_spi1: spi@78b5000 { > #size-cells = <0>; > reg = <0x078b5000 0x600>; > interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; > - spi-max-frequency = <50000000>; > clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>, > <&gcc GCC_BLSP1_AHB_CLK>; > clock-names = "core", "iface";
On 16.04.2023 14:37, Krzysztof Kozlowski wrote: > Since commit 6c84bbd103d8 ("dt-bindings: arm-smmu: Add generic > qcom,smmu-500 bindings") the SMMU is supposed to use qcom,smmu-500 > compatible fallback: > > ['qcom,qdu1000-smmu-500', 'arm,mmu-500'] is too short > ['qcom,qdu1000-smmu-500', 'arm,mmu-500'] is too long > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > arch/arm64/boot/dts/qcom/qdu1000.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi > index fb553f0bb17a..ddc3239478ae 100644 > --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi > +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi > @@ -1113,7 +1113,7 @@ qup_spi15_cs: qup-spi15-cs-state { > }; > > apps_smmu: iommu@15000000 { > - compatible = "qcom,qdu1000-smmu-500", "arm,mmu-500"; > + compatible = "qcom,qdu1000-smmu-500", "qcom,smmu-500", "arm,mmu-500"; > reg = <0x0 0x15000000 0x0 0x100000>; > #iommu-cells = <2>; > #global-interrupts = <2>;
On 16.04.2023 14:37, Krzysztof Kozlowski wrote: > Bindings expect ADC channel node names to follow specific pattern: > > sm6125-xiaomi-laurel-sprout.dtb: adc@3100: 'adc-chan@4d', 'adc-chan@4e', 'adc-chan@52', 'adc-chan@54' do not match any of the regexes: ... > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts b/arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts > index b1038eb8cebc..a7f4aeae9c1a 100644 > --- a/arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts > +++ b/arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts > @@ -138,7 +138,7 @@ &pm6125_adc { > pinctrl-names = "default"; > pinctrl-0 = <&camera_flash_therm &emmc_ufs_therm>; > > - adc-chan@4d { > + channel@4d { > reg = <ADC5_AMUX_THM1_100K_PU>; > qcom,ratiometric; > qcom,hw-settle-time = <200>; > @@ -146,7 +146,7 @@ adc-chan@4d { > label = "rf_pa0_therm"; > }; > > - adc-chan@4e { > + channel@4e { > reg = <ADC5_AMUX_THM2_100K_PU>; > qcom,ratiometric; > qcom,hw-settle-time = <200>; > @@ -154,7 +154,7 @@ adc-chan@4e { > label = "quiet_therm"; > }; > > - adc-chan@52 { > + channel@52 { > reg = <ADC5_GPIO1_100K_PU>; > qcom,ratiometric; > qcom,hw-settle-time = <200>; > @@ -162,7 +162,7 @@ adc-chan@52 { > label = "camera_flash_therm"; > }; > > - adc-chan@54 { > + channel@54 { > reg = <ADC5_GPIO3_100K_PU>; > qcom,ratiometric; > qcom,hw-settle-time = <200>;
On Sun, 16 Apr 2023 14:37:25 +0200, Krzysztof Kozlowski wrote: > The spi-max-frequency property belongs to SPI devices, not SPI > controller: > > ipq6018-cp01-c1.dtb: spi@78b5000: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected) > > Applied, thanks! [1/6] arm64: dts: qcom: ipq6018: drop incorrect SPI bus spi-max-frequency commit: b8420d478aa3fc739fcdba6b4b945850b356cb3b [2/6] arm64: dts: qcom: ipq8074: drop incorrect SPI bus spi-max-frequency commit: e6e0e706940b64e3a77e0a4840037692f109bd5f [3/6] arm64: dts: qcom: qdu1000: add missing qcom,smmu-500 fallback commit: 395aba1b1912d059a13345531fd4090caf51da38 [4/6] arm64: dts: qcom: sm8250: add missing qcom,smmu-500 fallback commit: 2438aba45f65b723763299a7b34eddfc40923680 [5/6] arm64: dts: qcom: sm8550-qrd: add missing PCIE1 PHY AUX clock frequency commit: ec888e6cff94af8fc5889824d98b1f1df65f3131 [6/6] arm64: dts: qcom: sm6125-sprout: align ADC channel node names with bindings commit: a2d8dcd48e132967eb8596a02a06185db8fbcb92 Best regards,
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index f531797f2619..54af7cb3c7a8 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -441,7 +441,6 @@ blsp1_spi1: spi@78b5000 { #size-cells = <0>; reg = <0x0 0x078b5000 0x0 0x600>; interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; - spi-max-frequency = <50000000>; clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; @@ -456,7 +455,6 @@ blsp1_spi2: spi@78b6000 { #size-cells = <0>; reg = <0x0 0x078b6000 0x0 0x600>; interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; - spi-max-frequency = <50000000>; clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface";
The spi-max-frequency property belongs to SPI devices, not SPI controller: ipq6018-cp01-c1.dtb: spi@78b5000: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 -- 1 file changed, 2 deletions(-)