[v1,2/2] gpio: ds4520: Add ADI DS4520 Regulator Support

Message ID	20230327130010.8342-3-okan.sahin@analog.com
State	New
Headers	show Return-Path: <linux-gpio-owner@vger.kernel.org> From: Okan Sahin <okan.sahin@analog.com> To: <okan.sahin@analog.com> CC: Linus Walleij <linus.walleij@linaro.org>, Bartosz Golaszewski <brgl@bgdev.pl>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, <linux-gpio@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org> Subject: [PATCH v1 2/2] gpio: ds4520: Add ADI DS4520 Regulator Support Date: Mon, 27 Mar 2023 16:00:07 +0300 Message-ID: <20230327130010.8342-3-okan.sahin@analog.com> In-Reply-To: <20230327130010.8342-1-okan.sahin@analog.com> References: <20230327130010.8342-1-okan.sahin@analog.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII Precedence: bulk
Series	Add DS4520 GPIO Expander Support \| expand [v1,0/2] Add DS4520 GPIO Expander Support [v1,1/2] dt-bindings: gpio: ds4520: Add ADI DS4520 [v1,2/2] gpio: ds4520: Add ADI DS4520 Regulator Support

diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 13be729710f2..20aa28e208d5 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -1000,6 +1000,16 @@ config GPIO_ADNP enough to represent all pins, but the driver will assume a register layout for 64 pins (8 registers). +config GPIO_DS4520 + tristate "DS4520 I2C GPIO expander" + select REGMAP_I2C + help + GPIO driver for Maxim MAX7300 I2C-based GPIO expander. + Say yes here to enable the GPIO driver for the ADI DS4520 chip. + + To compile this driver as a module, choose M here: the module will + be called gpio-ds4520. + config GPIO_GW_PLD tristate "Gateworks PLD GPIO Expander" depends on OF_GPIO diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index c048ba003367..6f8656d5d617 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -52,6 +52,7 @@ obj-$(CONFIG_GPIO_DA9052) += gpio-da9052.o obj-$(CONFIG_GPIO_DA9055) += gpio-da9055.o obj-$(CONFIG_GPIO_DAVINCI) += gpio-davinci.o obj-$(CONFIG_GPIO_DLN2) += gpio-dln2.o +obj-$(CONFIG_GPIO_DS4520) += gpio-ds4520.o obj-$(CONFIG_GPIO_DWAPB) += gpio-dwapb.o obj-$(CONFIG_GPIO_EIC_SPRD) += gpio-eic-sprd.o obj-$(CONFIG_GPIO_EM) += gpio-em.o diff --git a/drivers/gpio/gpio-ds4520.c b/drivers/gpio/gpio-ds4520.c new file mode 100644 index 000000000000..8f878e7824b8 --- /dev/null +++ b/drivers/gpio/gpio-ds4520.c @@ -0,0 +1,198 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (c) 2023 Analog Devices, Inc. + * Driver for the DS4520 I/O Expander + */ + +#include <linux/bits.h> +#include <linux/bitfield.h> +#include <linux/gpio/driver.h> +#include <linux/i2c.h> +#include <linux/regmap.h> + +#define NUMBER_OF_GPIO 9 + +#define PULLUP0 0xF0 +#define IO_CONTROL0 0xF2 +#define IO_STATUS0 0xF8 + +#define REG_SIZE 8 + +struct ds4520_gpio_priv { + struct regmap *regmap; + struct gpio_chip gpio_chip; +}; + +static int ds4520_gpio_get_direction(struct gpio_chip *chip, + unsigned int offset) +{ + struct ds4520_gpio_priv *priv = gpiochip_get_data(chip); + u32 val_io_control = 0, val_pullup = 0; + u8 reg_offset = (offset / REG_SIZE); + int ret; + + ret = regmap_set_bits(priv->regmap, 0xF4, 0x01); + if (ret) + return ret; + + ret = regmap_read(priv->regmap, IO_CONTROL0 + reg_offset, + &val_io_control); + if (ret) + return ret; + + ret = regmap_read(priv->regmap, PULLUP0 + reg_offset, &val_pullup); + if (ret) + return ret; + + if ((val_io_control & (1 << (offset % 8))) + == (val_pullup & (1 << (offset % 8)))) + return GPIO_LINE_DIRECTION_OUT; + else + return GPIO_LINE_DIRECTION_IN; +} + +static int ds4520_gpio_direction_input(struct gpio_chip *chip, + unsigned int offset) +{ + struct ds4520_gpio_priv *priv = gpiochip_get_data(chip); + u8 reg_offset = (offset / REG_SIZE); + u8 mask = BIT(offset % 8); + int ret; + + ret = regmap_clear_bits(priv->regmap, IO_CONTROL0 + reg_offset, mask); + if (ret) + return ret; + + ret = regmap_set_bits(priv->regmap, PULLUP0 + reg_offset, mask); + if (ret) + return ret; + + return 0; +} + +static int ds4520_gpio_get(struct gpio_chip *chip, unsigned int offset) +{ + struct ds4520_gpio_priv *priv = gpiochip_get_data(chip); + u8 reg_offset = (offset / REG_SIZE); + u8 mask = BIT(offset % 8); + u32 val = 0; + int ret; + + ret = regmap_read(priv->regmap, IO_STATUS0 + reg_offset, &val); + if (ret) + return ret; + + return !!(val & mask); +} + +static void ds4520_gpio_set(struct gpio_chip *chip, unsigned int offset, + int value) +{ + struct ds4520_gpio_priv *priv = gpiochip_get_data(chip); + u8 reg_offset = (offset / REG_SIZE); + u8 mask = BIT(offset % 8); + + regmap_update_bits(priv->regmap, PULLUP0 + reg_offset, mask, + value ? mask : 0); + regmap_update_bits(priv->regmap, IO_CONTROL0 + reg_offset, mask, + value ? mask : 0); +} + +static int ds4520_gpio_direction_output(struct gpio_chip *chip, + unsigned int offset, int value) +{ + struct ds4520_gpio_priv *priv = gpiochip_get_data(chip); + u8 reg_offset = (offset / REG_SIZE); + u8 mask = BIT(offset % 8); + int ret; + + ret = regmap_clear_bits(priv->regmap, IO_CONTROL0 + reg_offset, mask); + if (ret) + return ret; + + ds4520_gpio_set(chip, offset, value); + + return 0; +} + +static const struct regmap_config ds4520_regmap_config = { + .reg_bits = 8, + .val_bits = 8, +}; + +static const struct gpio_chip ds4520_chip = { + .label = "ds4520-gpio", + .owner = THIS_MODULE, + .get_direction = ds4520_gpio_get_direction, + .direction_input = ds4520_gpio_direction_input, + .direction_output = ds4520_gpio_direction_output, + .get = ds4520_gpio_get, + .set = ds4520_gpio_set, + .base = -1, + .can_sleep = true, +}; + +static int ds4520_gpio_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct ds4520_gpio_priv *priv; + u32 ngpio; + int ret; + + ngpio = NUMBER_OF_GPIO; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->gpio_chip = ds4520_chip; + priv->gpio_chip.label = "ds4520-gpio"; + priv->gpio_chip.ngpio = ngpio; + priv->gpio_chip.parent = dev; + + priv->regmap = devm_regmap_init_i2c(client, &ds4520_regmap_config); + if (IS_ERR(priv->regmap)) { + ret = PTR_ERR(priv->regmap); + dev_err_probe(dev, ret, + "Failed to allocate register map\n"); + return ret; + } + + ret = devm_gpiochip_add_data(dev, &priv->gpio_chip, priv); + if (ret) { + dev_err_probe(dev, ret, "Unable to register gpiochip\n"); + return ret; + } + + i2c_set_clientdata(client, priv); + + return 0; +} + +static const struct of_device_id ds4520_gpio_of_match_table[] = { + { + .compatible = "adi,ds4520-gpio" + }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, ds4520_gpio_of_match_table); + +static const struct i2c_device_id ds4520_gpio_id_table[] = { + { "ds4520-gpio" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(i2c, ds4520_gpio_id_table); + +static struct i2c_driver ds4520_gpio_driver = { + .driver = { + .name = "ds4520-gpio", + .of_match_table = ds4520_gpio_of_match_table, + }, + .probe_new = ds4520_gpio_probe, + .id_table = ds4520_gpio_id_table, +}; +module_i2c_driver(ds4520_gpio_driver); + +MODULE_DESCRIPTION("DS4520 I/O Expander"); +MODULE_AUTHOR("Okan Sahin <okan.sahin@analog.com>"); +MODULE_LICENSE("GPL");

[v1,2/2] gpio: ds4520: Add ADI DS4520 Regulator Support

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