Message ID | 20230327125316.210812-1-brgl@bgdev.pl |
---|---|
Headers | show |
Series | arm64: dts: qcom: sa8775p: add basic PMIC support | expand |
On 27.03.2023 14:53, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > Add the Power Domain Controller node for SA8775p. > > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > arch/arm64/boot/dts/qcom/sa8775p.dtsi | 47 +++++++++++++++++++++++++++ > 1 file changed, 47 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > index 296ba69b81ab..6bb1db1839cc 100644 > --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi > +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > @@ -591,6 +591,53 @@ tcsr_mutex: hwlock@1f40000 { > #hwlock-cells = <1>; > }; > > + pdc: interrupt-controller@b220000 { > + compatible = "qcom,sa8775p-pdc", "qcom,pdc"; > + reg = <0x0 0x0b220000 0x0 0x30000>, > + <0x0 0x17c000f0 0x0 0x64>; > + qcom,pdc-ranges = <0 480 40>, > + <40 140 14>, > + <54 263 1>, > + <55 306 4>, > + <59 312 3>, > + <62 374 2>, > + <64 434 2>, > + <66 438 2>, > + <70 520 1>, > + <73 523 1>, > + <118 568 6>, > + <124 609 3>, > + <159 638 1>, > + <160 720 3>, > + <169 728 30>, > + <199 416 2>, > + <201 449 1>, > + <202 89 1>, > + <203 451 1>, > + <204 462 1>, > + <205 264 1>, > + <206 579 1>, > + <207 653 1>, > + <208 656 1>, > + <209 659 1>, > + <210 122 1>, > + <211 699 1>, > + <212 705 1>, > + <213 450 1>, > + <214 643 2>, > + <216 646 5>, > + <221 390 5>, > + <226 700 2>, > + <228 440 1>, > + <229 663 1>, > + <230 524 2>, > + <232 612 3>, > + <235 723 5>; > + #interrupt-cells = <2>; > + interrupt-parent = <&intc>; > + interrupt-controller; > + }; > + > tlmm: pinctrl@f000000 { > compatible = "qcom,sa8775p-tlmm"; > reg = <0x0 0x0f000000 0x0 0x1000000>;
On 27.03.2023 14:53, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > Add the thermal zones and associated alarm nodes for the PMICs that have > them hooked up on sa8775p-ride. > > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 112 ++++++++++++++++++++ > 1 file changed, 112 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi > index 8616ead3daf5..be12997a080c 100644 > --- a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi > +++ b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi > @@ -6,6 +6,90 @@ > #include <dt-bindings/input/input.h> > #include <dt-bindings/spmi/spmi.h> > > +/ { > + thermal-zones { > + pmm8654au_0_thermal: pm8775-0-thermal { > + polling-delay-passive = <100>; > + polling-delay = <0>; > + thermal-sensors = <&pmm8654au_0_temp_alarm>; > + > + trips { > + trip0 { > + temperature = <105000>; > + hysteresis = <0>; > + type = "passive"; > + }; > + > + trip1 { > + temperature = <125000>; > + hysteresis = <0>; > + type = "critical"; > + }; > + }; > + }; > + > + pmm8654au_1_thermal: pm8775-1-thermal { > + polling-delay-passive = <100>; > + polling-delay = <0>; > + thermal-sensors = <&pmm8654au_1_temp_alarm>; > + > + trips { > + trip0 { > + temperature = <105000>; > + hysteresis = <0>; > + type = "passive"; > + }; > + > + trip1 { > + temperature = <125000>; > + hysteresis = <0>; > + type = "critical"; > + }; > + }; > + }; > + > + pmm8654au_2_thermal: pm8775-2-thermal { > + polling-delay-passive = <100>; > + polling-delay = <0>; > + thermal-sensors = <&pmm8654au_2_temp_alarm>; > + > + trips { > + trip0 { > + temperature = <105000>; > + hysteresis = <0>; > + type = "passive"; > + }; > + > + trip1 { > + temperature = <125000>; > + hysteresis = <0>; > + type = "critical"; > + }; > + }; > + }; > + > + pmm8654au_3_thermal: pm8775-3-thermal { > + polling-delay-passive = <100>; > + polling-delay = <0>; > + thermal-sensors = <&pmm8654au_3_temp_alarm>; > + > + trips { > + trip0 { > + temperature = <105000>; > + hysteresis = <0>; > + type = "passive"; > + }; > + > + trip1 { > + temperature = <125000>; > + hysteresis = <0>; > + type = "critical"; > + }; > + }; > + }; > + }; > +}; > + > &spmi_bus { > pmm8654au_0: pmic@0 { > compatible = "qcom,pmm8654au", "qcom,spmi-pmic"; > @@ -13,6 +97,13 @@ pmm8654au_0: pmic@0 { > #address-cells = <1>; > #size-cells = <0>; > > + pmm8654au_0_temp_alarm: temp-alarm@a00 { > + compatible = "qcom,spmi-temp-alarm"; > + reg = <0xa00>; > + interrupts-extended = <&spmi_bus 0x0 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; > + #thermal-sensor-cells = <0>; > + }; > + > pmm8654au_0_pon: pon@1200 { > compatible = "qcom,pmk8350-pon"; > reg = <0x1200>, <0x800>; > @@ -41,6 +132,13 @@ pmm8654au_1: pmic@2 { > reg = <0x2 SPMI_USID>; > #address-cells = <1>; > #size-cells = <0>; > + > + pmm8654au_1_temp_alarm: temp-alarm@a00 { > + compatible = "qcom,spmi-temp-alarm"; > + reg = <0xa00>; > + interrupts-extended = <&spmi_bus 0x2 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; > + #thermal-sensor-cells = <0>; > + }; > }; > > pmm8654au_2: pmic@4 { > @@ -48,6 +146,13 @@ pmm8654au_2: pmic@4 { > reg = <0x4 SPMI_USID>; > #address-cells = <1>; > #size-cells = <0>; > + > + pmm8654au_2_temp_alarm: temp-alarm@a00 { > + compatible = "qcom,spmi-temp-alarm"; > + reg = <0xa00>; > + interrupts-extended = <&spmi_bus 0x4 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; > + #thermal-sensor-cells = <0>; > + }; > }; > > pmm8654au_3: pmic@6 { > @@ -55,5 +160,12 @@ pmm8654au_3: pmic@6 { > reg = <0x6 SPMI_USID>; > #address-cells = <1>; > #size-cells = <0>; > + > + pmm8654au_3_temp_alarm: temp-alarm@a00 { > + compatible = "qcom,spmi-temp-alarm"; > + reg = <0xa00>; > + interrupts-extended = <&spmi_bus 0x6 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; > + #thermal-sensor-cells = <0>; > + }; > }; > };
On 27.03.2023 14:53, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > Add the RPMH regulators exposed by the PMM8654au PMIC and its variants. > > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > Cc: Mark Brown <broonie@kernel.org> > --- I can't check the validity of the regulator types and ranges, but for the overall picture: Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > drivers/regulator/qcom-rpmh-regulator.c | 55 +++++++++++++++++++++++++ > 1 file changed, 55 insertions(+) > > diff --git a/drivers/regulator/qcom-rpmh-regulator.c b/drivers/regulator/qcom-rpmh-regulator.c > index 4826d60e5d95..b0a58c62b1e2 100644 > --- a/drivers/regulator/qcom-rpmh-regulator.c > +++ b/drivers/regulator/qcom-rpmh-regulator.c > @@ -694,6 +694,16 @@ static const struct rpmh_vreg_hw_data pmic5_pldo_lv = { > .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, > }; > > +static const struct rpmh_vreg_hw_data pmic5_pldo515_mv = { > + .regulator_type = VRM, > + .ops = &rpmh_regulator_vrm_drms_ops, > + .voltage_range = REGULATOR_LINEAR_RANGE(1800000, 0, 187, 8000), > + .n_voltages = 188, > + .hpm_min_load_uA = 10000, > + .pmic_mode_map = pmic_mode_map_pmic5_ldo, > + .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, > +}; > + > static const struct rpmh_vreg_hw_data pmic5_nldo = { > .regulator_type = VRM, > .ops = &rpmh_regulator_vrm_drms_ops, > @@ -704,6 +714,16 @@ static const struct rpmh_vreg_hw_data pmic5_nldo = { > .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, > }; > > +static const struct rpmh_vreg_hw_data pmic5_nldo515 = { > + .regulator_type = VRM, > + .ops = &rpmh_regulator_vrm_drms_ops, > + .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 210, 8000), > + .n_voltages = 211, > + .hpm_min_load_uA = 30000, > + .pmic_mode_map = pmic_mode_map_pmic5_ldo, > + .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, > +}; > + > static const struct rpmh_vreg_hw_data pmic5_hfsmps510 = { > .regulator_type = VRM, > .ops = &rpmh_regulator_vrm_ops, > @@ -749,6 +769,15 @@ static const struct rpmh_vreg_hw_data pmic5_ftsmps525_mv = { > .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, > }; > > +static const struct rpmh_vreg_hw_data pmic5_ftsmps527 = { > + .regulator_type = VRM, > + .ops = &rpmh_regulator_vrm_ops, > + .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000), > + .n_voltages = 215, > + .pmic_mode_map = pmic_mode_map_pmic5_smps, > + .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, > +}; > + > static const struct rpmh_vreg_hw_data pmic5_hfsmps515 = { > .regulator_type = VRM, > .ops = &rpmh_regulator_vrm_ops, > @@ -937,6 +966,28 @@ static const struct rpmh_vreg_init_data pmm8155au_vreg_data[] = { > {} > }; > > +static const struct rpmh_vreg_init_data pmm8654au_vreg_data[] = { > + RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps527, "vdd-s1"), > + RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps527, "vdd-s2"), > + RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps527, "vdd-s3"), > + RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps527, "vdd-s4"), > + RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps527, "vdd-s5"), > + RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps527, "vdd-s6"), > + RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps527, "vdd-s7"), > + RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps527, "vdd-s8"), > + RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps527, "vdd-s9"), > + RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-s9"), > + RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2-l3"), > + RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l2-l3"), > + RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo515, "vdd-s9"), > + RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo515, "vdd-s9"), > + RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo515, "vdd-l6-l7"), > + RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo515, "vdd-l6-l7"), > + RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo515_mv, "vdd-l8-l9"), > + RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l8-l9"), > + {} > +}; > + > static const struct rpmh_vreg_init_data pm8350_vreg_data[] = { > RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), > RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"), > @@ -1431,6 +1482,10 @@ static const struct of_device_id __maybe_unused rpmh_regulator_match_table[] = { > .compatible = "qcom,pmm8155au-rpmh-regulators", > .data = pmm8155au_vreg_data, > }, > + { > + .compatible = "qcom,pmm8654au-rpmh-regulators", > + .data = pmm8654au_vreg_data, > + }, > { > .compatible = "qcom,pmx55-rpmh-regulators", > .data = pmx55_vreg_data,
On Mon, Mar 27, 2023 at 2:53 PM Bartosz Golaszewski <brgl@bgdev.pl> wrote: > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > Add support for the GPIO controller present on the pmm8654au PMIC. > > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > Cc: Linus Walleij <linus.walleij@linaro.org> > Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Yours, Linus Walleij
On Mon, 27 Mar 2023 14:52:58 +0200, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > This adds support for a number of PMIC functionalities on sa8775p. The PMIC > used on the reference board is pm8654au which is another variant of the SPMI > PMIC from Qualcomm with an automotive twist. > > v2 -> v3: > - add GPIO line names for the PMIC GPIOs on sa8775p-ride > - add missing GPIO chips to the PMIC .dtsi > - add missing thermal zones and alerts > - add regulators (driver support and regulator settings for sa8775p-ride) > - add missing PDC mappings > - squash patches 7 and 8 to avoid adding code without users > - dropped Krzysztof's Ack from patch 3 as it now extends the max number of > mappings so most likely needs a second look > > [...] Applied, thanks! [01/18] arm64: dts: qcom: sa8775p: pad reg properties to 8 digits commit: 3fd7e2eec8f4fedbe3b252cf436be8527f7a5f82 [02/18] arm64: dts: qcom: sa8775p: sort soc nodes by reg property commit: f95f988cf7b609157630dd1f2f7e8d297aadbe2b [04/18] arm64: dts: qcom: sa8775p: add the pdc node commit: 8696cd072e955bd6f5df757774e47f0b9dd29920 [05/18] arm64: dts: qcom: sa8775p: add the spmi node commit: fdd55b3babedce5abd1c1f90afc3ab2199a772ad [07/18] arm64: dts: qcom: sa8775p: add support for the on-board PMICs commit: 634a3de323fc5c67c144919e298259d8d9d44a4b [08/18] arm64: dts: qcom: sa8775p: add the Power On device node commit: d2d9a592746cd454bd5b8f72193f2d3db2e62a44 [09/18] arm64: dts: qcom: sa8775p: pmic: add the power key commit: b3a755ba16e6f61d93c811b827edacc9946b0500 [10/18] arm64: dts: qcom: sa8775p: pmic: add support for the pmm8654 RESIN input commit: cecff1f5429d975df9649376e2bd5a2fb004f988 [11/18] arm64: dts: qcom: sa8775p: pmic: add thermal zones commit: fa40ca07e943333a14d247988ef5008a59949153 [14/18] arm64: dts: qcom: sa8775p: add PMIC GPIO controller nodes commit: e5a893a7cec5776e10c25d7fa80b5ad1edf88c17 [15/18] arm64: dts: qcom: sa8775p-ride: set gpio-line-names for PMIC GPIOs commit: 81767c1591dcb711f1f78a80e510b667b1fb5718 Best regards,
From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> This adds support for a number of PMIC functionalities on sa8775p. The PMIC used on the reference board is pm8654au which is another variant of the SPMI PMIC from Qualcomm with an automotive twist. v2 -> v3: - add GPIO line names for the PMIC GPIOs on sa8775p-ride - add missing GPIO chips to the PMIC .dtsi - add missing thermal zones and alerts - add regulators (driver support and regulator settings for sa8775p-ride) - add missing PDC mappings - squash patches 7 and 8 to avoid adding code without users - dropped Krzysztof's Ack from patch 3 as it now extends the max number of mappings so most likely needs a second look v1 -> v2: - improve DT coding style where needed - don't disable the power button in PMIC's .dtsi - add debounce time for pwrkey and resin inputs - use the official PMIC's name in DT labels - add reg-names property for the PON node - add patches that tidy up the dtsi before the PMIC stuff Bartosz Golaszewski (18): arm64: dts: qcom: sa8775p: pad reg properties to 8 digits arm64: dts: qcom: sa8775p: sort soc nodes by reg property dt-bindings: interrupt-controller: qcom-pdc: add compatible for sa8775p arm64: dts: qcom: sa8775p: add the pdc node arm64: dts: qcom: sa8775p: add the spmi node dt-bindings: mfd: qcom,spmi-pmic: add compatible for pmm8654au arm64: dts: qcom: sa8775p: add support for the on-board PMICs arm64: dts: qcom: sa8775p: add the Power On device node arm64: dts: qcom: sa8775p: pmic: add the power key arm64: dts: qcom: sa8775p: pmic: add support for the pmm8654 RESIN input arm64: dts: qcom: sa8775p: pmic: add thermal zones dt-bindings: pinctrl: qcom,pmic-gpio: add compatible for pmm8654au-gpio pinctrl: qcom: spmi-gpio: add support for pmm8654au-gpio arm64: dts: qcom: sa8775p: add PMIC GPIO controller nodes arm64: dts: qcom: sa8775p-ride: set gpio-line-names for PMIC GPIOs dt-bindings: regulator: qcom,rpmh: add compatible for pmm8654au RPMH regulator: qcom-rpmh: add support for pmm8654au regulators arm64: dts: qcom: sa8775p-ride: add PMIC regulators .../interrupt-controller/qcom,pdc.yaml | 3 +- .../bindings/mfd/qcom,spmi-pmic.yaml | 1 + .../bindings/pinctrl/qcom,pmic-gpio.yaml | 2 + .../regulator/qcom,rpmh-regulator.yaml | 14 + arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 211 ++++++++ arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 285 +++++++++++ arch/arm64/boot/dts/qcom/sa8775p.dtsi | 465 ++++++++++-------- drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 1 + drivers/regulator/qcom-rpmh-regulator.c | 55 +++ 9 files changed, 838 insertions(+), 199 deletions(-) create mode 100644 arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi