Message ID | 20230313074552.54457-3-yangyicong@huawei.com |
---|---|
State | New |
Headers | show |
Series | Improvement and fix for HiSilicon I2C driver | expand |
On Mon, Mar 13, 2023 at 03:45:52PM +0800, Yicong Yang wrote: > From: Yicong Yang <yangyicong@hisilicon.com> > > The controller will always generate a completion interrupt when the > transfer is finished normally or not. Currently we use either error or > completion interrupt to finish, this may result the completion > interrupt unhandled and corrupt the next transfer, especially at low > speed mode. Since on error case, the error interrupt will come first > then is the completion interrupt. So only use the completion interrupt > to finish the whole transfer process. > > Fixes: d62fbdb99a85 ("i2c: add support for HiSilicon I2C controller") > Reported-by: Sheng Feng <fengsheng5@huawei.com> > Signed-off-by: Sheng Feng <fengsheng5@huawei.com> > Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Applied to for-current, thanks!
diff --git a/drivers/i2c/busses/i2c-hisi.c b/drivers/i2c/busses/i2c-hisi.c index 1b7609a34f4a..e067671b3ce2 100644 --- a/drivers/i2c/busses/i2c-hisi.c +++ b/drivers/i2c/busses/i2c-hisi.c @@ -348,7 +348,11 @@ static irqreturn_t hisi_i2c_irq(int irq, void *context) hisi_i2c_read_rx_fifo(ctlr); out: - if (int_stat & HISI_I2C_INT_TRANS_CPLT || ctlr->xfer_err) { + /* + * Only use TRANS_CPLT to indicate the completion. On error cases we'll + * get two interrupts, INT_ERR first then TRANS_CPLT. + */ + if (int_stat & HISI_I2C_INT_TRANS_CPLT) { hisi_i2c_disable_int(ctlr, HISI_I2C_INT_ALL); hisi_i2c_clear_int(ctlr, HISI_I2C_INT_ALL); complete(ctlr->completion);