Message ID | 20230320105339.236279-6-biju.das.jz@bp.renesas.com |
---|---|
State | New |
Headers | show |
Series | Renesas SCI fixes | expand |
Hi Geert, Thanks for the feedback. > -----Original Message----- > From: Geert Uytterhoeven <geert@linux-m68k.org> > Sent: Monday, March 20, 2023 7:15 PM > To: Biju Das <biju.das.jz@bp.renesas.com> > Cc: Rob Herring <robh+dt@kernel.org>; Krzysztof Kozlowski > <krzysztof.kozlowski+dt@linaro.org>; Geert Uytterhoeven > <geert+renesas@glider.be>; Magnus Damm <magnus.damm@gmail.com>; linux- > renesas-soc@vger.kernel.org; devicetree@vger.kernel.org; Prabhakar Mahadev > Lad <prabhakar.mahadev-lad.rj@bp.renesas.com> > Subject: Re: [PATCH v3 5/5] arm64: dts: renesas: r9a07g044: Enable sci0 > nodes using dt overlay > > Hi Biju, > > On Mon, Mar 20, 2023 at 11:54 AM Biju Das <biju.das.jz@bp.renesas.com> > wrote: > > Enable sci0 node using dt overlay and disable can{0,1}-stb-hog nodes > > in dt overlay as its pins are shared with sci0 pins. > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > --- > > v3: > > * New patch > > Thanks for your patch! > > > --- /dev/null > > +++ b/arch/arm64/boot/dts/renesas/r9a07g043-smarc.dtso > > Can you please come up with a better filename? > Perhaps r9a07g043-smarc-pmod.dtso? Agreed. > > > @@ -0,0 +1,45 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * Device Tree Source for the RZ/{G2UL, Five} SMARC EVK PMOD parts > > + * > > + * Copyright (C) 2023 Renesas Electronics Corp. > > + * > > + * > > + * [Connection] > > + * > > + * SMARC EVK PMOD USBUART > > + * +----------------------------+ > > + * |CN7 (PMOD1 PIN HEADER) | > > + * | SCI0_TXD pin7 |<----->| pin2 Tx | > > + * | SCI1_RXD pin8 |<----->| pin3 Rx | Typo SCI0_RXD > > + * | Gnd pin11 |<----->| pin5 Gnd | > > + * | Vcc pin12 |<----->| pin6 Vcc | > > + * +----------------------------+ +---------------+ > > I don't think the right side of this diagram belongs here. The user is not > limited to a USB-UART bridge, but can connect whatever he wants to the PMOD > connector. Agreed. > > > + * > > + */ > > + > > +/dts-v1/; > > +/plugin/; > > +#include <dt-bindings/gpio/gpio.h> > > Unused? OK, will drop. > > > +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h> > > + > > +&pinctrl { > > + can0-stb-hog { > > + status = "disabled"; > > + }; > > + > > + can1-stb-hog { > > + status = "disabled"; > > + }; > > + > > + sci0_pins: sci0-pins { > > + pinmux = <RZG2L_PORT_PINMUX(2, 2, 5)>, /* TxD */ > > + <RZG2L_PORT_PINMUX(2, 3, 5)>; /* RxD */ > > + }; Next version, I am planning to move this pinctrl definitions to rzg2ul-smarc-pinfunction.dtsi as separate patch, since it is SoC specific? +++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi @@ -50,6 +50,13 @@ i2c1_pins: i2c1 { input-enable; }; +#if (SW_ET0_EN_N) + sci0_pins: sci0-pins { + pinmux = <RZG2L_PORT_PINMUX(2, 2, 5)>, /* TxD */ + <RZG2L_PORT_PINMUX(2, 3, 5)>; /* RxD */ + }; +#endif Cheers, Biju > > +}; > > + > > +&sci0 { > > + pinctrl-0 = <&sci0_pins>; > > + pinctrl-names = "default"; > > + status = "okay"; > > +}; > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux- > m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like > that. > -- Linus Torvalds
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile index 23b10c03091c..be938f360264 100644 --- a/arch/arm64/boot/dts/renesas/Makefile +++ b/arch/arm64/boot/dts/renesas/Makefile @@ -76,6 +76,7 @@ dtb-$(CONFIG_ARCH_R8A77961) += r8a779m3-ulcb-kf.dtb dtb-$(CONFIG_ARCH_R8A77965) += r8a779m5-salvator-xs.dtb dtb-$(CONFIG_ARCH_R9A07G043) += r9a07g043u11-smarc.dtb +dtb-$(CONFIG_ARCH_R9A07G043) += r9a07g043-smarc.dtbo dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc.dtb dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb diff --git a/arch/arm64/boot/dts/renesas/r9a07g043-smarc.dtso b/arch/arm64/boot/dts/renesas/r9a07g043-smarc.dtso new file mode 100644 index 000000000000..515f9fb82938 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r9a07g043-smarc.dtso @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the RZ/{G2UL, Five} SMARC EVK PMOD parts + * + * Copyright (C) 2023 Renesas Electronics Corp. + * + * + * [Connection] + * + * SMARC EVK PMOD USBUART + * +----------------------------+ + * |CN7 (PMOD1 PIN HEADER) | + * | SCI0_TXD pin7 |<----->| pin2 Tx | + * | SCI1_RXD pin8 |<----->| pin3 Rx | + * | Gnd pin11 |<----->| pin5 Gnd | + * | Vcc pin12 |<----->| pin6 Vcc | + * +----------------------------+ +---------------+ + * + */ + +/dts-v1/; +/plugin/; +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h> + +&pinctrl { + can0-stb-hog { + status = "disabled"; + }; + + can1-stb-hog { + status = "disabled"; + }; + + sci0_pins: sci0-pins { + pinmux = <RZG2L_PORT_PINMUX(2, 2, 5)>, /* TxD */ + <RZG2L_PORT_PINMUX(2, 3, 5)>; /* RxD */ + }; +}; + +&sci0 { + pinctrl-0 = <&sci0_pins>; + pinctrl-names = "default"; + status = "okay"; +};
Enable sci0 node using dt overlay and disable can{0,1}-stb-hog nodes in dt overlay as its pins are shared with sci0 pins. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- v3: * New patch --- arch/arm64/boot/dts/renesas/Makefile | 1 + .../boot/dts/renesas/r9a07g043-smarc.dtso | 45 +++++++++++++++++++ 2 files changed, 46 insertions(+) create mode 100644 arch/arm64/boot/dts/renesas/r9a07g043-smarc.dtso