| Message ID | 20230307183503.2512684-19-richard.henderson@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | tcg: Remove tcg_const_* | expand |
On 3/7/23 15:34, Richard Henderson wrote: > All uses are strictly read-only. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> > Cc: Daniel Henrique Barboza <danielhb413@gmail.com> > Cc: Cédric Le Goater <clg@kaod.org> > Cc: David Gibson <david@gibson.dropbear.id.au> > Cc: Greg Kurz <groug@kaod.org> > Cc: qemu-ppc@nongnu.org > --- > target/ppc/translate/fp-impl.c.inc | 26 ++++++++++++-------------- > 1 file changed, 12 insertions(+), 14 deletions(-) > > diff --git a/target/ppc/translate/fp-impl.c.inc b/target/ppc/translate/fp-impl.c.inc > index d5d88e7d49..57d8437851 100644 > --- a/target/ppc/translate/fp-impl.c.inc > +++ b/target/ppc/translate/fp-impl.c.inc > @@ -348,7 +348,7 @@ static void gen_fcmpo(DisasContext *ctx) > t0 = tcg_temp_new_i64(); > t1 = tcg_temp_new_i64(); > gen_reset_fpstatus(); > - crf = tcg_const_i32(crfD(ctx->opcode)); > + crf = tcg_constant_i32(crfD(ctx->opcode)); > get_fpr(t0, rA(ctx->opcode)); > get_fpr(t1, rB(ctx->opcode)); > gen_helper_fcmpo(cpu_env, t0, t1, crf); > @@ -368,7 +368,7 @@ static void gen_fcmpu(DisasContext *ctx) > t0 = tcg_temp_new_i64(); > t1 = tcg_temp_new_i64(); > gen_reset_fpstatus(); > - crf = tcg_const_i32(crfD(ctx->opcode)); > + crf = tcg_constant_i32(crfD(ctx->opcode)); > get_fpr(t0, rA(ctx->opcode)); > get_fpr(t1, rB(ctx->opcode)); > gen_helper_fcmpu(cpu_env, t0, t1, crf); > @@ -541,7 +541,7 @@ static void gen_mcrfs(DisasContext *ctx) > tcg_gen_andi_i64(tnew_fpscr, tnew_fpscr, > ~((0xF << shift) & FP_EX_CLEAR_BITS)); > /* FEX and VX need to be updated, so don't set fpscr directly */ > - tmask = tcg_const_i32(1 << nibble); > + tmask = tcg_constant_i32(1 << nibble); > gen_helper_store_fpscr(cpu_env, tnew_fpscr, tmask); > } > > @@ -681,9 +681,7 @@ static void gen_mtfsb0(DisasContext *ctx) > crb = 31 - crbD(ctx->opcode); > gen_reset_fpstatus(); > if (likely(crb != FPSCR_FEX && crb != FPSCR_VX)) { > - TCGv_i32 t0; > - t0 = tcg_const_i32(crb); > - gen_helper_fpscr_clrbit(cpu_env, t0); > + gen_helper_fpscr_clrbit(cpu_env, tcg_constant_i32(crb)); > } > if (unlikely(Rc(ctx->opcode) != 0)) { > tcg_gen_trunc_tl_i32(cpu_crf[1], cpu_fpscr); > @@ -703,9 +701,7 @@ static void gen_mtfsb1(DisasContext *ctx) > crb = 31 - crbD(ctx->opcode); > /* XXX: we pretend we can only do IEEE floating-point computations */ > if (likely(crb != FPSCR_FEX && crb != FPSCR_VX && crb != FPSCR_NI)) { > - TCGv_i32 t0; > - t0 = tcg_const_i32(crb); > - gen_helper_fpscr_setbit(cpu_env, t0); > + gen_helper_fpscr_setbit(cpu_env, tcg_constant_i32(crb)); > } > if (unlikely(Rc(ctx->opcode) != 0)) { > tcg_gen_trunc_tl_i32(cpu_crf[1], cpu_fpscr); > @@ -733,10 +729,12 @@ static void gen_mtfsf(DisasContext *ctx) > gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); > return; > } > - if (l) { > - t0 = tcg_const_i32((ctx->insns_flags2 & PPC2_ISA205) ? 0xffff : 0xff); > + if (!l) { > + t0 = tcg_constant_i32(flm << (w * 8)); > + } else if (ctx->insns_flags2 & PPC2_ISA205) { > + t0 = tcg_constant_i32(0xffff); > } else { > - t0 = tcg_const_i32(flm << (w * 8)); > + t0 = tcg_constant_i32(0xff); > } > t1 = tcg_temp_new_i64(); > get_fpr(t1, rB(ctx->opcode)); > @@ -767,8 +765,8 @@ static void gen_mtfsfi(DisasContext *ctx) > return; > } > sh = (8 * w) + 7 - bf; > - t0 = tcg_const_i64(((uint64_t)FPIMM(ctx->opcode)) << (4 * sh)); > - t1 = tcg_const_i32(1 << sh); > + t0 = tcg_constant_i64(((uint64_t)FPIMM(ctx->opcode)) << (4 * sh)); > + t1 = tcg_constant_i32(1 << sh); > gen_helper_store_fpscr(cpu_env, t0, t1); > if (unlikely(Rc(ctx->opcode) != 0)) { > tcg_gen_trunc_tl_i32(cpu_crf[1], cpu_fpscr);
On 7/3/23 19:34, Richard Henderson wrote: > All uses are strictly read-only. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > Cc: Daniel Henrique Barboza <danielhb413@gmail.com> > Cc: Cédric Le Goater <clg@kaod.org> > Cc: David Gibson <david@gibson.dropbear.id.au> > Cc: Greg Kurz <groug@kaod.org> > Cc: qemu-ppc@nongnu.org > --- > target/ppc/translate/fp-impl.c.inc | 26 ++++++++++++-------------- > 1 file changed, 12 insertions(+), 14 deletions(-) Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
diff --git a/target/ppc/translate/fp-impl.c.inc b/target/ppc/translate/fp-impl.c.inc index d5d88e7d49..57d8437851 100644 --- a/target/ppc/translate/fp-impl.c.inc +++ b/target/ppc/translate/fp-impl.c.inc @@ -348,7 +348,7 @@ static void gen_fcmpo(DisasContext *ctx) t0 = tcg_temp_new_i64(); t1 = tcg_temp_new_i64(); gen_reset_fpstatus(); - crf = tcg_const_i32(crfD(ctx->opcode)); + crf = tcg_constant_i32(crfD(ctx->opcode)); get_fpr(t0, rA(ctx->opcode)); get_fpr(t1, rB(ctx->opcode)); gen_helper_fcmpo(cpu_env, t0, t1, crf); @@ -368,7 +368,7 @@ static void gen_fcmpu(DisasContext *ctx) t0 = tcg_temp_new_i64(); t1 = tcg_temp_new_i64(); gen_reset_fpstatus(); - crf = tcg_const_i32(crfD(ctx->opcode)); + crf = tcg_constant_i32(crfD(ctx->opcode)); get_fpr(t0, rA(ctx->opcode)); get_fpr(t1, rB(ctx->opcode)); gen_helper_fcmpu(cpu_env, t0, t1, crf); @@ -541,7 +541,7 @@ static void gen_mcrfs(DisasContext *ctx) tcg_gen_andi_i64(tnew_fpscr, tnew_fpscr, ~((0xF << shift) & FP_EX_CLEAR_BITS)); /* FEX and VX need to be updated, so don't set fpscr directly */ - tmask = tcg_const_i32(1 << nibble); + tmask = tcg_constant_i32(1 << nibble); gen_helper_store_fpscr(cpu_env, tnew_fpscr, tmask); } @@ -681,9 +681,7 @@ static void gen_mtfsb0(DisasContext *ctx) crb = 31 - crbD(ctx->opcode); gen_reset_fpstatus(); if (likely(crb != FPSCR_FEX && crb != FPSCR_VX)) { - TCGv_i32 t0; - t0 = tcg_const_i32(crb); - gen_helper_fpscr_clrbit(cpu_env, t0); + gen_helper_fpscr_clrbit(cpu_env, tcg_constant_i32(crb)); } if (unlikely(Rc(ctx->opcode) != 0)) { tcg_gen_trunc_tl_i32(cpu_crf[1], cpu_fpscr); @@ -703,9 +701,7 @@ static void gen_mtfsb1(DisasContext *ctx) crb = 31 - crbD(ctx->opcode); /* XXX: we pretend we can only do IEEE floating-point computations */ if (likely(crb != FPSCR_FEX && crb != FPSCR_VX && crb != FPSCR_NI)) { - TCGv_i32 t0; - t0 = tcg_const_i32(crb); - gen_helper_fpscr_setbit(cpu_env, t0); + gen_helper_fpscr_setbit(cpu_env, tcg_constant_i32(crb)); } if (unlikely(Rc(ctx->opcode) != 0)) { tcg_gen_trunc_tl_i32(cpu_crf[1], cpu_fpscr); @@ -733,10 +729,12 @@ static void gen_mtfsf(DisasContext *ctx) gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); return; } - if (l) { - t0 = tcg_const_i32((ctx->insns_flags2 & PPC2_ISA205) ? 0xffff : 0xff); + if (!l) { + t0 = tcg_constant_i32(flm << (w * 8)); + } else if (ctx->insns_flags2 & PPC2_ISA205) { + t0 = tcg_constant_i32(0xffff); } else { - t0 = tcg_const_i32(flm << (w * 8)); + t0 = tcg_constant_i32(0xff); } t1 = tcg_temp_new_i64(); get_fpr(t1, rB(ctx->opcode)); @@ -767,8 +765,8 @@ static void gen_mtfsfi(DisasContext *ctx) return; } sh = (8 * w) + 7 - bf; - t0 = tcg_const_i64(((uint64_t)FPIMM(ctx->opcode)) << (4 * sh)); - t1 = tcg_const_i32(1 << sh); + t0 = tcg_constant_i64(((uint64_t)FPIMM(ctx->opcode)) << (4 * sh)); + t1 = tcg_constant_i32(1 << sh); gen_helper_store_fpscr(cpu_env, t0, t1); if (unlikely(Rc(ctx->opcode) != 0)) { tcg_gen_trunc_tl_i32(cpu_crf[1], cpu_fpscr);
All uses are strictly read-only. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- Cc: Daniel Henrique Barboza <danielhb413@gmail.com> Cc: Cédric Le Goater <clg@kaod.org> Cc: David Gibson <david@gibson.dropbear.id.au> Cc: Greg Kurz <groug@kaod.org> Cc: qemu-ppc@nongnu.org --- target/ppc/translate/fp-impl.c.inc | 26 ++++++++++++-------------- 1 file changed, 12 insertions(+), 14 deletions(-)