| Message ID | 20230216120012.28357-1-quic_poovendh@quicinc.com |
|---|---|
| Headers | show |
| Series | Enable crashdump collection support for IPQ9574 | expand |
On 2/16/2023 7:30 PM, Mukesh Ojha wrote: > > > On 2/16/2023 5:30 PM, Poovendhan Selvaraj wrote: >> CrashDump collection is based on the DLOAD bit of TCSR register. >> To retain other bits, we read the register and modify only the DLOAD >> bit as >> the other bits have their own significance. >> >> Co-developed-by: Anusha Rao <quic_anusha@quicinc.com> >> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> >> Co-developed-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> >> Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> >> Signed-off-by: Poovendhan Selvaraj <quic_poovendh@quicinc.com> >> --- >> Changes in V5: >> - checking the return value in qcom_scm_set_download_mode function as >> suggested by Srinivas Kandagatla >> >> Changes in V4: >> - retain the orginal value of tcsr register when download mode >> is not set >> >> drivers/firmware/qcom_scm.c | 21 ++++++++++++++++----- >> 1 file changed, 16 insertions(+), 5 deletions(-) >> >> diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c >> index 468d4d5ab550..d88c5f14bd54 100644 >> --- a/drivers/firmware/qcom_scm.c >> +++ b/drivers/firmware/qcom_scm.c >> @@ -407,7 +407,7 @@ int qcom_scm_set_remote_state(u32 state, u32 id) >> } >> EXPORT_SYMBOL(qcom_scm_set_remote_state); >> -static int __qcom_scm_set_dload_mode(struct device *dev, bool enable) >> +static int __qcom_scm_set_dload_mode(struct device *dev, u32 val, >> bool enable) >> { >> struct qcom_scm_desc desc = { >> .svc = QCOM_SCM_SVC_BOOT, >> @@ -417,7 +417,8 @@ static int __qcom_scm_set_dload_mode(struct device >> *dev, bool enable) >> .owner = ARM_SMCCC_OWNER_SIP, >> }; >> - desc.args[1] = enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0; >> + desc.args[1] = enable ? val | QCOM_SCM_BOOT_SET_DLOAD_MODE : >> + val & ~(QCOM_SCM_BOOT_SET_DLOAD_MODE); >> return qcom_scm_call_atomic(__scm->dev, &desc, NULL); >> } >> @@ -426,15 +427,25 @@ static void qcom_scm_set_download_mode(bool enable) >> { >> bool avail; >> int ret = 0; >> + u32 dload_addr_val; >> avail = __qcom_scm_is_call_available(__scm->dev, >> QCOM_SCM_SVC_BOOT, >> QCOM_SCM_BOOT_SET_DLOAD_MODE); >> + ret = qcom_scm_io_readl(__scm->dload_mode_addr, &dload_addr_val); >> + >> + if (ret) { >> + dev_err(__scm->dev, >> + "failed to read dload mode address value: %d\n", ret); >> + return; >> + } >> + >> if (avail) { >> - ret = __qcom_scm_set_dload_mode(__scm->dev, enable); >> + ret = __qcom_scm_set_dload_mode(__scm->dev, dload_addr_val, >> enable); > > Did you test this on a target where it comes under this if statement? > does it really need to know dload_mode_addr for this target ? Can we do something like this? I would let other review as well. --------------------------------------->0------------------------------------------- diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index cdbfe54..26b7eda 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -419,6 +419,7 @@ static void qcom_scm_set_download_mode(bool enable) { bool avail; int ret = 0; + u32 dload_addr_val; avail = __qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_BOOT, @@ -426,8 +427,16 @@ static void qcom_scm_set_download_mode(bool enable) if (avail) { ret = __qcom_scm_set_dload_mode(__scm->dev, enable); } else if (__scm->dload_mode_addr) { - ret = qcom_scm_io_writel(__scm->dload_mode_addr, - enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0); + ret = qcom_scm_io_readl(__scm->dload_mode_addr, &dload_addr_val); + if (ret) { + dev_err(__scm->dev, + "failed to read dload mode address value: %d\n", ret); + return; + } + + ret = qcom_scm_io_writel(__scm->dload_mode_addr, enable ? + dload_addr_val | QCOM_SCM_BOOT_SET_DLOAD_MODE : + dload_addr_val & ~(QCOM_SCM_BOOT_SET_DLOAD_MODE)); } else { dev_err(__scm->dev, "No available mechanism for setting download mode\n"); -Mukesh > > -Mukesh >> } else if (__scm->dload_mode_addr) { >> - ret = qcom_scm_io_writel(__scm->dload_mode_addr, >> - enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0); >> + ret = qcom_scm_io_writel(__scm->dload_mode_addr, enable ? >> + dload_addr_val | QCOM_SCM_BOOT_SET_DLOAD_MODE : >> + dload_addr_val & ~(QCOM_SCM_BOOT_SET_DLOAD_MODE)); >> } else { >> dev_err(__scm->dev, >> "No available mechanism for setting download mode\n");
On 2/18/2023 1:19 AM, Mukesh Ojha wrote: > > > On 2/16/2023 7:30 PM, Mukesh Ojha wrote: >> >> >> On 2/16/2023 5:30 PM, Poovendhan Selvaraj wrote: >>> CrashDump collection is based on the DLOAD bit of TCSR register. >>> To retain other bits, we read the register and modify only the DLOAD >>> bit as >>> the other bits have their own significance. >>> >>> Co-developed-by: Anusha Rao <quic_anusha@quicinc.com> >>> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> >>> Co-developed-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> >>> Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> >>> Signed-off-by: Poovendhan Selvaraj <quic_poovendh@quicinc.com> >>> --- >>> Changes in V5: >>> - checking the return value in qcom_scm_set_download_mode >>> function as >>> suggested by Srinivas Kandagatla >>> >>> Changes in V4: >>> - retain the orginal value of tcsr register when download mode >>> is not set >>> >>> drivers/firmware/qcom_scm.c | 21 ++++++++++++++++----- >>> 1 file changed, 16 insertions(+), 5 deletions(-) >>> >>> diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c >>> index 468d4d5ab550..d88c5f14bd54 100644 >>> --- a/drivers/firmware/qcom_scm.c >>> +++ b/drivers/firmware/qcom_scm.c >>> @@ -407,7 +407,7 @@ int qcom_scm_set_remote_state(u32 state, u32 id) >>> } >>> EXPORT_SYMBOL(qcom_scm_set_remote_state); >>> -static int __qcom_scm_set_dload_mode(struct device *dev, bool enable) >>> +static int __qcom_scm_set_dload_mode(struct device *dev, u32 val, >>> bool enable) >>> { >>> struct qcom_scm_desc desc = { >>> .svc = QCOM_SCM_SVC_BOOT, >>> @@ -417,7 +417,8 @@ static int __qcom_scm_set_dload_mode(struct >>> device *dev, bool enable) >>> .owner = ARM_SMCCC_OWNER_SIP, >>> }; >>> - desc.args[1] = enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0; >>> + desc.args[1] = enable ? val | QCOM_SCM_BOOT_SET_DLOAD_MODE : >>> + val & ~(QCOM_SCM_BOOT_SET_DLOAD_MODE); >>> return qcom_scm_call_atomic(__scm->dev, &desc, NULL); >>> } >>> @@ -426,15 +427,25 @@ static void qcom_scm_set_download_mode(bool >>> enable) >>> { >>> bool avail; >>> int ret = 0; >>> + u32 dload_addr_val; >>> avail = __qcom_scm_is_call_available(__scm->dev, >>> QCOM_SCM_SVC_BOOT, >>> QCOM_SCM_BOOT_SET_DLOAD_MODE); >>> + ret = qcom_scm_io_readl(__scm->dload_mode_addr, &dload_addr_val); >>> + >>> + if (ret) { >>> + dev_err(__scm->dev, >>> + "failed to read dload mode address value: %d\n", ret); >>> + return; >>> + } >>> + >>> if (avail) { >>> - ret = __qcom_scm_set_dload_mode(__scm->dev, enable); >>> + ret = __qcom_scm_set_dload_mode(__scm->dev, dload_addr_val, >>> enable); >> >> Did you test this on a target where it comes under this if statement? >> does it really need to know dload_mode_addr for this target ? > > > Can we do something like this? I would let other review as well. > > --------------------------------------->0------------------------------------------- > > diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c > index cdbfe54..26b7eda 100644 > --- a/drivers/firmware/qcom_scm.c > +++ b/drivers/firmware/qcom_scm.c > @@ -419,6 +419,7 @@ static void qcom_scm_set_download_mode(bool enable) > { > bool avail; > int ret = 0; > + u32 dload_addr_val; > > avail = __qcom_scm_is_call_available(__scm->dev, > QCOM_SCM_SVC_BOOT, > @@ -426,8 +427,16 @@ static void qcom_scm_set_download_mode(bool enable) > if (avail) { > ret = __qcom_scm_set_dload_mode(__scm->dev, enable); > } else if (__scm->dload_mode_addr) { > - ret = qcom_scm_io_writel(__scm->dload_mode_addr, > - enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE > : 0); > + ret = qcom_scm_io_readl(__scm->dload_mode_addr, > &dload_addr_val); > + if (ret) { > + dev_err(__scm->dev, > + "failed to read dload mode address > value: %d\n", ret); > + return; > + } > + > + ret = qcom_scm_io_writel(__scm->dload_mode_addr, enable ? > + dload_addr_val | > QCOM_SCM_BOOT_SET_DLOAD_MODE : > + dload_addr_val & > ~(QCOM_SCM_BOOT_SET_DLOAD_MODE)); > } else { > dev_err(__scm->dev, > "No available mechanism for setting download > mode\n"); > > -Mukesh Okay sure..Agreed, will address this in the next patch. >> >> -Mukesh >>> } else if (__scm->dload_mode_addr) { >>> - ret = qcom_scm_io_writel(__scm->dload_mode_addr, >>> - enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0); >>> + ret = qcom_scm_io_writel(__scm->dload_mode_addr, enable ? >>> + dload_addr_val | QCOM_SCM_BOOT_SET_DLOAD_MODE : >>> + dload_addr_val & ~(QCOM_SCM_BOOT_SET_DLOAD_MODE)); >>> } else { >>> dev_err(__scm->dev, >>> "No available mechanism for setting download mode\n"); Best Regards, Poovendhan S
On 2/22/2023 12:22 PM, Sricharan Ramabadhran wrote: > Hi, > > On 2/20/2023 4:00 PM, POOVENDHAN SELVARAJ wrote: >> >> On 2/18/2023 1:19 AM, Mukesh Ojha wrote: >>> >>> >>> On 2/16/2023 7:30 PM, Mukesh Ojha wrote: >>>> >>>> >>>> On 2/16/2023 5:30 PM, Poovendhan Selvaraj wrote: >>>>> CrashDump collection is based on the DLOAD bit of TCSR register. >>>>> To retain other bits, we read the register and modify only the >>>>> DLOAD bit as >>>>> the other bits have their own significance. >>>>> >>>>> Co-developed-by: Anusha Rao <quic_anusha@quicinc.com> >>>>> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> >>>>> Co-developed-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> >>>>> Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> >>>>> Signed-off-by: Poovendhan Selvaraj <quic_poovendh@quicinc.com> >>>>> --- >>>>> Changes in V5: >>>>> - checking the return value in qcom_scm_set_download_mode >>>>> function as >>>>> suggested by Srinivas Kandagatla >>>>> >>>>> Changes in V4: >>>>> - retain the orginal value of tcsr register when download mode >>>>> is not set >>>>> >>>>> drivers/firmware/qcom_scm.c | 21 ++++++++++++++++----- >>>>> 1 file changed, 16 insertions(+), 5 deletions(-) >>>>> >>>>> diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c >>>>> index 468d4d5ab550..d88c5f14bd54 100644 >>>>> --- a/drivers/firmware/qcom_scm.c >>>>> +++ b/drivers/firmware/qcom_scm.c >>>>> @@ -407,7 +407,7 @@ int qcom_scm_set_remote_state(u32 state, u32 id) >>>>> } >>>>> EXPORT_SYMBOL(qcom_scm_set_remote_state); >>>>> -static int __qcom_scm_set_dload_mode(struct device *dev, bool enable) >>>>> +static int __qcom_scm_set_dload_mode(struct device *dev, u32 val, >>>>> bool enable) >>>>> { >>>>> struct qcom_scm_desc desc = { >>>>> .svc = QCOM_SCM_SVC_BOOT, >>>>> @@ -417,7 +417,8 @@ static int __qcom_scm_set_dload_mode(struct >>>>> device *dev, bool enable) >>>>> .owner = ARM_SMCCC_OWNER_SIP, >>>>> }; >>>>> - desc.args[1] = enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0; >>>>> + desc.args[1] = enable ? val | QCOM_SCM_BOOT_SET_DLOAD_MODE : >>>>> + val & ~(QCOM_SCM_BOOT_SET_DLOAD_MODE); >>>>> return qcom_scm_call_atomic(__scm->dev, &desc, NULL); >>>>> } >>>>> @@ -426,15 +427,25 @@ static void qcom_scm_set_download_mode(bool >>>>> enable) >>>>> { >>>>> bool avail; >>>>> int ret = 0; >>>>> + u32 dload_addr_val; >>>>> avail = __qcom_scm_is_call_available(__scm->dev, >>>>> QCOM_SCM_SVC_BOOT, >>>>> QCOM_SCM_BOOT_SET_DLOAD_MODE); >>>>> + ret = qcom_scm_io_readl(__scm->dload_mode_addr, &dload_addr_val); >>>>> + >>>>> + if (ret) { >>>>> + dev_err(__scm->dev, >>>>> + "failed to read dload mode address value: %d\n", ret); >>>>> + return; >>>>> + } >>>>> + >>>>> if (avail) { >>>>> - ret = __qcom_scm_set_dload_mode(__scm->dev, enable); >>>>> + ret = __qcom_scm_set_dload_mode(__scm->dev, >>>>> dload_addr_val, enable); >>>> >>>> Did you test this on a target where it comes under this if >>>> statement? does it really need to know dload_mode_addr for this >>>> target ? >>> >>> >>> Can we do something like this? I would let other review as well. >>> >>> --------------------------------------->0------------------------------------------- >>> diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c >>> index cdbfe54..26b7eda 100644 >>> --- a/drivers/firmware/qcom_scm.c >>> +++ b/drivers/firmware/qcom_scm.c >>> @@ -419,6 +419,7 @@ static void qcom_scm_set_download_mode(bool enable) >>> { >>> bool avail; >>> int ret = 0; >>> + u32 dload_addr_val; >>> >>> avail = __qcom_scm_is_call_available(__scm->dev, >>> QCOM_SCM_SVC_BOOT, >>> @@ -426,8 +427,16 @@ static void qcom_scm_set_download_mode(bool enable) >>> if (avail) { >>> ret = __qcom_scm_set_dload_mode(__scm->dev, enable); >>> } else if (__scm->dload_mode_addr) { >>> - ret = qcom_scm_io_writel(__scm->dload_mode_addr, >>> - enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE >>> : 0); >>> + ret = qcom_scm_io_readl(__scm->dload_mode_addr, >>> &dload_addr_val); >>> + if (ret) { >>> + dev_err(__scm->dev, >>> + "failed to read dload mode address >>> value: %d\n", ret); >>> + return; >>> + } >>> + >>> + ret = qcom_scm_io_writel(__scm->dload_mode_addr, >>> enable ? >>> + dload_addr_val | >>> QCOM_SCM_BOOT_SET_DLOAD_MODE : >>> + dload_addr_val & >>> ~(QCOM_SCM_BOOT_SET_DLOAD_MODE)); >>> } else { >>> dev_err(__scm->dev, >>> "No available mechanism for setting download >>> mode\n"); >>> >>> -Mukesh >> >> Okay sure..Agreed, will address this in the next patch. > > Also, not sure, if its better to keep the old behavior working for > targets that does not support 'READ' of this address. If one such > thing exists, that will be broken now. In such a case, we should > ignore if scm_io_readl fails, still write and dload_addr_val should > be '0' initialised. Why would a secure read of this register would fail, if one is allowed to do secure write ? Honestly, i was not understanding the purpose of this bitwise handling of this patch, i thought it is trying to fix existing issue for some target. For some of the upstream target(e.g sm8450, i verified it myself), it is not an issue. arch/arm64/boot/dts/qcom/msm8916.dtsi: qcom,dload-mode = <&tcsr 0x6100>; arch/arm64/boot/dts/qcom/msm8976.dtsi: qcom,dload-mode = <&tcsr 0x6100>; arch/arm64/boot/dts/qcom/msm8996.dtsi: qcom,dload-mode = <&tcsr_2 0x13000>; arch/arm64/boot/dts/qcom/sm8450.dtsi: qcom,dload-mode = <&tcsr 0x13000>; However, it looks valid to handle only the effective bits. I have worked on top of this patch and tested it and posted here. https://lore.kernel.org/lkml/1676990381-18184-1-git-send-email-quic_mojha@quicinc.com/ Do you have any example of any upstream target where this would fail ? -Mukesh > > > Regards, > Sricharan >
Crashdump collection is enabled based on the DLOAD bit in the TCSR register. This bit is set during bootup and clearing during shutdown. During crash, dload bit is not cleared, due to which uboot starts crashdump collection. Enable the support for download mode to collect the crashdumps if system crashes, to debug crashes extensively. During the bootup, bootloaders initialize the SMEM. However the bootup after crash, SMEM will not be initialized again. If the memory for the SMEM is not reserved, linux consumes that region, which leads to the loss of SMEM data. So, during the next bootup after crash, bootloaders will hang due to invalid data present in the SMEM region. Due to this, added the SMEM support along with crashdump collection series. This patch series adds the support for crashdump collection. DTS patch depends on the IPQ9574 baseport series https://lore.kernel.org/linux-arm-kernel/20230214163116.9924-1-quic_devipriy@quicinc.com/ V5: - change logs are added to the respective patches. V4 can be found at https://lore.kernel.org/linux-arm-kernel/20230214051414.10740-1-quic_poovendh@quicinc.com/ V3 can be found at https://lore.kernel.org/linux-arm-msm/20230208053332.16537-1-quic_poovendh@quicinc.com/ Changes in V2: - rebased on linux-next/master - dropped co-developed by tag wherever applicable - V1 can be found at https://lore.kernel.org/linux-arm-kernel/20230113160012.14893-1-quic_poovendh@quicinc.com/ Poovendhan Selvaraj (5): dt-bindings: scm: Add compatible for IPQ9574 dt-bindings: mfd: Add the tcsr compatible for IPQ9574 arm64: dts: qcom: ipq9574: Enable the download mode support arm64: dts: qcom: ipq9574: Add SMEM support firmware: scm: Modify only the DLOAD bit in TCSR register for download mode .../bindings/firmware/qcom,scm.yaml | 1 + .../devicetree/bindings/mfd/qcom,tcsr.yaml | 1 + arch/arm64/boot/dts/qcom/ipq9574.dtsi | 25 +++++++++++++++++++ drivers/firmware/qcom_scm.c | 21 ++++++++++++---- 4 files changed, 43 insertions(+), 5 deletions(-) base-commit: 509583475828c4fd86897113f78315c1431edcc3