diff mbox series

[07/14] target/arm: Fix svep width in arm_gen_dynamic_svereg_xml

Message ID 20230214163048.903964-8-richard.henderson@linaro.org
State Superseded
Headers show
Series target/arm: gdbstub cleanups and additions | expand

Commit Message

Richard Henderson Feb. 14, 2023, 4:30 p.m. UTC 
Define svep based on the size of the predicates,
not the primary vector registers.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/gdbstub64.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Peter Maydell Feb. 20, 2023, 4:18 p.m. UTC | #1 
On Tue, 14 Feb 2023 at 16:33, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Define svep based on the size of the predicates,
> not the primary vector registers.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM
diff mbox series

Patch

diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c
index 02a0256c5c..ec61211949 100644
--- a/target/arm/gdbstub64.c
+++ b/target/arm/gdbstub64.c
@@ -297,7 +297,7 @@  int arm_gen_dynamic_svereg_xml(CPUState *cs, int orig_base_reg)
     /* Create the predicate vector type. */
     g_string_append_printf(s,
                            "<vector id=\"svep\" type=\"uint8\" count=\"%d\"/>",
-                           reg_width / 8);
+                           pred_width / 8);
 
     /* Define the vector registers. */
     for (i = 0; i < 32; i++) {