diff mbox series

[1/2] ASoC: rt5640: Update MCLK rate in set_sysclk()

Message ID 1675953417-8686-2-git-send-email-spujar@nvidia.com
State Accepted
Commit 9f138bb2eaf661788df459dfcaf38feb080af41f
Headers show
Series Codec support on Jetson AGX Orin | expand

Commit Message

Sameer Pujar Feb. 9, 2023, 2:36 p.m. UTC
Simple-card/audio-graph-card drivers do not handle MCLK clock when it
is specified in the codec device node. The expectation here is that,
the codec should actually own up the MCLK clock and do necessary setup
in the driver.

This is inspired from,
commit dbf54a953435 ("ASoC: rt5659: Update MCLK rate in set_sysclk()").

Cc: Oder Chiou <oder_chiou@realtek.com>
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
---
 sound/soc/codecs/rt5640.c | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Kuninori Morimoto Feb. 12, 2023, 11:56 p.m. UTC | #1
Hi Sameer

> > Simple-card/audio-graph-card both are using asoc_simple_hw_params,
> > and it calls clk_set_rate() for Codec/CPU if it has mclk.
> > But am I misunderstanding ?
> > If it was simple-card-utils side miss, I'm happy to fix it.
> 
> The simple-card-utils driver does not populate the clock handle whenever 
> the MCLK clock is parsed from CODEC device node. So 
> asoc_simple_set_clk_rate() will not update the rate and clock 
> enable/disable won't happen either.Initially I had tried to fix this in 
> the simple-card-utils itself and it did break few things on other HW.
> Please see [0] for relevant discussion.
> 
> Later [1] was pushed to address the issue I was facing that time.
> 
> In summary, the suggestion was, clock property should be associated with 
> only devices and device driver should own up the clock handling for it. 
> The machine driver can just pass the required configuration for it.

Thank you for explanation about your issue,
I think I could understand it.

Thank you for your help !!

Best regards
---
Kuninori Morimoto
diff mbox series

Patch

diff --git a/sound/soc/codecs/rt5640.c b/sound/soc/codecs/rt5640.c
index 9e6341a..1392570 100644
--- a/sound/soc/codecs/rt5640.c
+++ b/sound/soc/codecs/rt5640.c
@@ -1838,9 +1838,14 @@  static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
 	struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);
 	unsigned int reg_val = 0;
 	unsigned int pll_bit = 0;
+	int ret;
 
 	switch (clk_id) {
 	case RT5640_SCLK_S_MCLK:
+		ret = clk_set_rate(rt5640->mclk, freq);
+		if (ret)
+			return ret;
+
 		reg_val |= RT5640_SCLK_SRC_MCLK;
 		break;
 	case RT5640_SCLK_S_PLL1: