| Message ID | 20230127093217.60818-2-krzysztof.kozlowski@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | dt-bindings: serial/mtd/mc/ata: use MC peripheral props | expand |
On Fri, Jan 27, 2023 at 10:32 AM Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > The properties of devices in IXP4xx expansion bus need to be also > applied to actual devices' bindings. Prepare for this by splitting them > to separate intel,ixp4xx-expansion-peripheral-props binding, just like > other memory-controller peripheral properties. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Whoa, this is a complex one! But I assume you and Marek know what you're doing so: Acked-by: Linus Walleij <linus.walleij@linaro.org> Maybe I can assign the following external bus interface to the Qcom people, as it is yet another one of those: Documentation/devicetree/bindings/bus/qcom,ebi2.txt I've been uncertain about how I should convert that one over properly. Yours, Linus Walleij
On 30/01/2023 20:12, Rob Herring wrote: > On Fri, Jan 27, 2023 at 10:32:15AM +0100, Krzysztof Kozlowski wrote: >> The properties of devices in IXP4xx expansion bus need to be also >> applied to actual devices' bindings. Prepare for this by splitting them >> to separate intel,ixp4xx-expansion-peripheral-props binding, just like >> other memory-controller peripheral properties. >> >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> >> --- >> ...intel,ixp4xx-expansion-bus-controller.yaml | 64 +-------------- >> ...tel,ixp4xx-expansion-peripheral-props.yaml | 80 +++++++++++++++++++ > > Kind of odd to have these in 2 directories. Can we move > intel,ixp4xx-expansion-bus-controller.yaml to > bindings/memory-controllers/? Indeed mostly we kept them so far in memory-controllers. Some of these buses are used for attaching some type of memory, but I don't know if ixp4xx can work like this. > > Or maybe all the external/parallel bus interfaces need their own > directory? Except the IXP4xx, I wouldn't know which one goes where... Example is exynos-srom which can work with memory (SRAM, ROM, flash) or devices. I'll move it to memory-controllers. > >> .../mc-peripheral-props.yaml | 1 + >> 3 files changed, 82 insertions(+), 63 deletions(-) >> create mode 100644 Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml >> >> diff --git a/Documentation/devicetree/bindings/bus/intel,ixp4xx-expansion-bus-controller.yaml b/Documentation/devicetree/bindings/bus/intel,ixp4xx-expansion-bus-controller.yaml >> index 5fb4e7bfa4da..a771796ec499 100644 >> --- a/Documentation/devicetree/bindings/bus/intel,ixp4xx-expansion-bus-controller.yaml >> +++ b/Documentation/devicetree/bindings/bus/intel,ixp4xx-expansion-bus-controller.yaml >> @@ -56,69 +56,7 @@ patternProperties: >> description: Devices attached to chip selects are represented as >> subnodes. >> type: object >> - >> - properties: >> - intel,ixp4xx-eb-t1: >> - description: Address timing, extend address phase with n cycles. >> - $ref: /schemas/types.yaml#/definitions/uint32 >> - maximum: 3 >> - >> - intel,ixp4xx-eb-t2: >> - description: Setup chip select timing, extend setup phase with n cycles. >> - $ref: /schemas/types.yaml#/definitions/uint32 >> - maximum: 3 >> - >> - intel,ixp4xx-eb-t3: >> - description: Strobe timing, extend strobe phase with n cycles. >> - $ref: /schemas/types.yaml#/definitions/uint32 >> - maximum: 15 >> - >> - intel,ixp4xx-eb-t4: >> - description: Hold timing, extend hold phase with n cycles. >> - $ref: /schemas/types.yaml#/definitions/uint32 >> - maximum: 3 >> - >> - intel,ixp4xx-eb-t5: >> - description: Recovery timing, extend recovery phase with n cycles. >> - $ref: /schemas/types.yaml#/definitions/uint32 >> - maximum: 15 >> - >> - intel,ixp4xx-eb-cycle-type: >> - description: The type of cycles to use on the expansion bus for this >> - chip select. 0 = Intel cycles, 1 = Motorola cycles, 2 = HPI cycles. >> - $ref: /schemas/types.yaml#/definitions/uint32 >> - enum: [0, 1, 2] >> - >> - intel,ixp4xx-eb-byte-access-on-halfword: >> - description: Allow byte read access on half word devices. >> - $ref: /schemas/types.yaml#/definitions/uint32 >> - enum: [0, 1] >> - >> - intel,ixp4xx-eb-hpi-hrdy-pol-high: >> - description: Set HPI HRDY polarity to active high when using HPI. >> - $ref: /schemas/types.yaml#/definitions/uint32 >> - enum: [0, 1] >> - >> - intel,ixp4xx-eb-mux-address-and-data: >> - description: Multiplex address and data on the data bus. >> - $ref: /schemas/types.yaml#/definitions/uint32 >> - enum: [0, 1] >> - >> - intel,ixp4xx-eb-ahb-split-transfers: >> - description: Enable AHB split transfers. >> - $ref: /schemas/types.yaml#/definitions/uint32 >> - enum: [0, 1] >> - >> - intel,ixp4xx-eb-write-enable: >> - description: Enable write cycles. >> - $ref: /schemas/types.yaml#/definitions/uint32 >> - enum: [0, 1] >> - >> - intel,ixp4xx-eb-byte-access: >> - description: Expansion bus uses only 8 bits. The default is to use >> - 16 bits. >> - $ref: /schemas/types.yaml#/definitions/uint32 >> - enum: [0, 1] >> + $ref: /schemas/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml# >> >> required: >> - compatible >> diff --git a/Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml b/Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml >> new file mode 100644 >> index 000000000000..8f782c80e88b >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml >> @@ -0,0 +1,80 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Peripheral properties for Intel IXP4xx Expansion Bus >> + >> +description: | > > Don't need '|'. Right. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/bus/intel,ixp4xx-expansion-bus-controller.yaml b/Documentation/devicetree/bindings/bus/intel,ixp4xx-expansion-bus-controller.yaml index 5fb4e7bfa4da..a771796ec499 100644 --- a/Documentation/devicetree/bindings/bus/intel,ixp4xx-expansion-bus-controller.yaml +++ b/Documentation/devicetree/bindings/bus/intel,ixp4xx-expansion-bus-controller.yaml @@ -56,69 +56,7 @@ patternProperties: description: Devices attached to chip selects are represented as subnodes. type: object - - properties: - intel,ixp4xx-eb-t1: - description: Address timing, extend address phase with n cycles. - $ref: /schemas/types.yaml#/definitions/uint32 - maximum: 3 - - intel,ixp4xx-eb-t2: - description: Setup chip select timing, extend setup phase with n cycles. - $ref: /schemas/types.yaml#/definitions/uint32 - maximum: 3 - - intel,ixp4xx-eb-t3: - description: Strobe timing, extend strobe phase with n cycles. - $ref: /schemas/types.yaml#/definitions/uint32 - maximum: 15 - - intel,ixp4xx-eb-t4: - description: Hold timing, extend hold phase with n cycles. - $ref: /schemas/types.yaml#/definitions/uint32 - maximum: 3 - - intel,ixp4xx-eb-t5: - description: Recovery timing, extend recovery phase with n cycles. - $ref: /schemas/types.yaml#/definitions/uint32 - maximum: 15 - - intel,ixp4xx-eb-cycle-type: - description: The type of cycles to use on the expansion bus for this - chip select. 0 = Intel cycles, 1 = Motorola cycles, 2 = HPI cycles. - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1, 2] - - intel,ixp4xx-eb-byte-access-on-halfword: - description: Allow byte read access on half word devices. - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1] - - intel,ixp4xx-eb-hpi-hrdy-pol-high: - description: Set HPI HRDY polarity to active high when using HPI. - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1] - - intel,ixp4xx-eb-mux-address-and-data: - description: Multiplex address and data on the data bus. - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1] - - intel,ixp4xx-eb-ahb-split-transfers: - description: Enable AHB split transfers. - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1] - - intel,ixp4xx-eb-write-enable: - description: Enable write cycles. - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1] - - intel,ixp4xx-eb-byte-access: - description: Expansion bus uses only 8 bits. The default is to use - 16 bits. - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1] + $ref: /schemas/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml# required: - compatible diff --git a/Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml b/Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml new file mode 100644 index 000000000000..8f782c80e88b --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Peripheral properties for Intel IXP4xx Expansion Bus + +description: | + The IXP4xx expansion bus controller handles access to devices on the + memory-mapped expansion bus on the Intel IXP4xx family of system on chips, + including IXP42x, IXP43x, IXP45x and IXP46x. + +maintainers: + - Linus Walleij <linus.walleij@linaro.org> + +properties: + intel,ixp4xx-eb-t1: + description: Address timing, extend address phase with n cycles. + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 3 + + intel,ixp4xx-eb-t2: + description: Setup chip select timing, extend setup phase with n cycles. + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 3 + + intel,ixp4xx-eb-t3: + description: Strobe timing, extend strobe phase with n cycles. + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + + intel,ixp4xx-eb-t4: + description: Hold timing, extend hold phase with n cycles. + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 3 + + intel,ixp4xx-eb-t5: + description: Recovery timing, extend recovery phase with n cycles. + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + + intel,ixp4xx-eb-cycle-type: + description: The type of cycles to use on the expansion bus for this + chip select. 0 = Intel cycles, 1 = Motorola cycles, 2 = HPI cycles. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2] + + intel,ixp4xx-eb-byte-access-on-halfword: + description: Allow byte read access on half word devices. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + + intel,ixp4xx-eb-hpi-hrdy-pol-high: + description: Set HPI HRDY polarity to active high when using HPI. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + + intel,ixp4xx-eb-mux-address-and-data: + description: Multiplex address and data on the data bus. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + + intel,ixp4xx-eb-ahb-split-transfers: + description: Enable AHB split transfers. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + + intel,ixp4xx-eb-write-enable: + description: Enable write cycles. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + + intel,ixp4xx-eb-byte-access: + description: Expansion bus uses only 8 bits. The default is to use + 16 bits. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml b/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml index 53ae995462db..5acfcad12bb7 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml @@ -34,5 +34,6 @@ required: # The controller specific properties go here. allOf: - $ref: st,stm32-fmc2-ebi-props.yaml# + - $ref: intel,ixp4xx-expansion-peripheral-props.yaml# additionalProperties: true
The properties of devices in IXP4xx expansion bus need to be also applied to actual devices' bindings. Prepare for this by splitting them to separate intel,ixp4xx-expansion-peripheral-props binding, just like other memory-controller peripheral properties. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- ...intel,ixp4xx-expansion-bus-controller.yaml | 64 +-------------- ...tel,ixp4xx-expansion-peripheral-props.yaml | 80 +++++++++++++++++++ .../mc-peripheral-props.yaml | 1 + 3 files changed, 82 insertions(+), 63 deletions(-) create mode 100644 Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml