| Message ID | 20230119185342.2093323-1-amit.kumar-mahapatra@amd.com |
|---|---|
| Headers | show |
| Series | spi: Add support for stacked/parallel memories | expand |
On Fri, 20 Jan 2023 00:23:33 +0530 Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> wrote: > Supporting multi-cs in spi drivers would require the chip_select & cs_gpiod > members of struct spi_device to be an array. But changing the type of these > members to array would break the spi driver functionality. To make the > transition smoother introduced four new APIs to get/set the > spi->chip_select & spi->cs_gpiod and replaced all spi->chip_select and > spi->cs_gpiod references with get or set API calls. > While adding multi-cs support in further patches the chip_select & cs_gpiod > members of the spi_device structure would be converted to arrays & the > "idx" parameter of the APIs would be used as array index i.e., > spi->chip_select[idx] & spi->cs_gpiod[idx] respectively. > > Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > --- > drivers/iio/imu/adis16400.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/iio/imu/adis16400.c b/drivers/iio/imu/adis16400.c > index c02fc35dceb4..3eda32e12a53 100644 > --- a/drivers/iio/imu/adis16400.c > +++ b/drivers/iio/imu/adis16400.c > @@ -466,7 +466,7 @@ static int adis16400_initial_setup(struct iio_dev *indio_dev) > > dev_info(&indio_dev->dev, "%s: prod_id 0x%04x at CS%d (irq %d)\n", > indio_dev->name, prod_id, > - st->adis.spi->chip_select, st->adis.spi->irq); > + spi_get_chipselect(st->adis.spi, 0), st->adis.spi->irq); > } > /* use high spi speed if possible */ > if (st->variant->flags & ADIS16400_HAS_SLOW_MODE) {
On 1/19/23 19:53, Amit Kumar Mahapatra wrote: > Supporting multi-cs in spi core and spi controller drivers would require > the chip_select & cs_gpiod members of struct spi_device to be an array. > But changing the type of these members to array would break the spi driver > functionality. To make the transition smoother introduced four new APIs to > get/set the spi->chip_select & spi->cs_gpiod and replaced all > spi->chip_select and spi->cs_gpiod references in spi core with the API > calls. > While adding multi-cs support in further patches the chip_select & cs_gpiod > members of the spi_device structure would be converted to arrays & the > "idx" parameter of the APIs would be used as array index i.e., > spi->chip_select[idx] & spi->cs_gpiod[idx] respectively. > > Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> > --- > drivers/spi/spi.c | 45 ++++++++++++++++++++--------------------- > include/linux/spi/spi.h | 20 ++++++++++++++++++ > 2 files changed, 42 insertions(+), 23 deletions(-) > > diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c > index 3cc7bb4d03de..38421e831a7d 100644 > --- a/drivers/spi/spi.c > +++ b/drivers/spi/spi.c > @@ -604,7 +604,7 @@ static void spi_dev_set_name(struct spi_device *spi) > } > > dev_set_name(&spi->dev, "%s.%u", dev_name(&spi->controller->dev), > - spi->chip_select); > + spi_get_chipselect(spi, 0)); > } > > static int spi_dev_check(struct device *dev, void *data) > @@ -613,7 +613,7 @@ static int spi_dev_check(struct device *dev, void *data) > struct spi_device *new_spi = data; > > if (spi->controller == new_spi->controller && > - spi->chip_select == new_spi->chip_select) > + spi_get_chipselect(spi, 0) == spi_get_chipselect(new_spi, 0)) > return -EBUSY; > return 0; > } > @@ -638,7 +638,7 @@ static int __spi_add_device(struct spi_device *spi) > status = bus_for_each_dev(&spi_bus_type, NULL, spi, spi_dev_check); > if (status) { > dev_err(dev, "chipselect %d already in use\n", > - spi->chip_select); > + spi_get_chipselect(spi, 0)); > return status; > } > > @@ -649,7 +649,7 @@ static int __spi_add_device(struct spi_device *spi) > } > > if (ctlr->cs_gpiods) > - spi->cs_gpiod = ctlr->cs_gpiods[spi->chip_select]; > + spi_set_csgpiod(spi, 0, ctlr->cs_gpiods[spi_get_chipselect(spi, 0)]); > > /* > * Drivers may modify this initial i/o setup, but will > @@ -692,8 +692,8 @@ int spi_add_device(struct spi_device *spi) > int status; > > /* Chipselects are numbered 0..max; validate. */ > - if (spi->chip_select >= ctlr->num_chipselect) { > - dev_err(dev, "cs%d >= max %d\n", spi->chip_select, > + if (spi_get_chipselect(spi, 0) >= ctlr->num_chipselect) { > + dev_err(dev, "cs%d >= max %d\n", spi_get_chipselect(spi, 0), > ctlr->num_chipselect); > return -EINVAL; > } > @@ -714,8 +714,8 @@ static int spi_add_device_locked(struct spi_device *spi) > struct device *dev = ctlr->dev.parent; > > /* Chipselects are numbered 0..max; validate. */ > - if (spi->chip_select >= ctlr->num_chipselect) { > - dev_err(dev, "cs%d >= max %d\n", spi->chip_select, > + if (spi_get_chipselect(spi, 0) >= ctlr->num_chipselect) { > + dev_err(dev, "cs%d >= max %d\n", spi_get_chipselect(spi, 0), > ctlr->num_chipselect); > return -EINVAL; > } > @@ -761,7 +761,7 @@ struct spi_device *spi_new_device(struct spi_controller *ctlr, > > WARN_ON(strlen(chip->modalias) >= sizeof(proxy->modalias)); > > - proxy->chip_select = chip->chip_select; > + spi_set_chipselect(proxy, 0, chip->chip_select); > proxy->max_speed_hz = chip->max_speed_hz; > proxy->mode = chip->mode; > proxy->irq = chip->irq; > @@ -970,24 +970,23 @@ static void spi_set_cs(struct spi_device *spi, bool enable, bool force) > * Avoid calling into the driver (or doing delays) if the chip select > * isn't actually changing from the last time this was called. > */ > - if (!force && ((enable && spi->controller->last_cs == spi->chip_select) || > - (!enable && spi->controller->last_cs != spi->chip_select)) && > + if (!force && ((enable && spi->controller->last_cs == spi_get_chipselect(spi, 0)) || > + (!enable && spi->controller->last_cs != spi_get_chipselect(spi, 0))) && > (spi->controller->last_cs_mode_high == (spi->mode & SPI_CS_HIGH))) > return; > > trace_spi_set_cs(spi, activate); > > - spi->controller->last_cs = enable ? spi->chip_select : -1; > + spi->controller->last_cs = enable ? spi_get_chipselect(spi, 0) : -1; > spi->controller->last_cs_mode_high = spi->mode & SPI_CS_HIGH; > > - if ((spi->cs_gpiod || !spi->controller->set_cs_timing) && !activate) { > + if ((spi_get_csgpiod(spi, 0) || !spi->controller->set_cs_timing) && !activate) > spi_delay_exec(&spi->cs_hold, NULL); > - } > > if (spi->mode & SPI_CS_HIGH) > enable = !enable; > > - if (spi->cs_gpiod) { > + if (spi_get_csgpiod(spi, 0)) { > if (!(spi->mode & SPI_NO_CS)) { > /* > * Historically ACPI has no means of the GPIO polarity and > @@ -1000,10 +999,10 @@ static void spi_set_cs(struct spi_device *spi, bool enable, bool force) > * into account. > */ > if (has_acpi_companion(&spi->dev)) > - gpiod_set_value_cansleep(spi->cs_gpiod, !enable); > + gpiod_set_value_cansleep(spi_get_csgpiod(spi, 0), !enable); > else > /* Polarity handled by GPIO library */ > - gpiod_set_value_cansleep(spi->cs_gpiod, activate); > + gpiod_set_value_cansleep(spi_get_csgpiod(spi, 0), activate); > } > /* Some SPI masters need both GPIO CS & slave_select */ > if ((spi->controller->flags & SPI_MASTER_GPIO_SS) && > @@ -1013,7 +1012,7 @@ static void spi_set_cs(struct spi_device *spi, bool enable, bool force) > spi->controller->set_cs(spi, !enable); > } > > - if (spi->cs_gpiod || !spi->controller->set_cs_timing) { > + if (spi_get_csgpiod(spi, 0) || !spi->controller->set_cs_timing) { > if (activate) > spi_delay_exec(&spi->cs_setup, NULL); > else > @@ -2304,7 +2303,7 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi, > nc, rc); > return rc; > } > - spi->chip_select = value; > + spi_set_chipselect(spi, 0, value); > > /* Device speed */ > if (!of_property_read_u32(nc, "spi-max-frequency", &value)) > @@ -2423,7 +2422,7 @@ struct spi_device *spi_new_ancillary_device(struct spi_device *spi, > strscpy(ancillary->modalias, "dummy", sizeof(ancillary->modalias)); > > /* Use provided chip-select for ancillary device */ > - ancillary->chip_select = chip_select; > + spi_set_chipselect(ancillary, 0, chip_select); > > /* Take over SPI mode/speed from SPI main device */ > ancillary->max_speed_hz = spi->max_speed_hz; > @@ -2670,7 +2669,7 @@ struct spi_device *acpi_spi_device_alloc(struct spi_controller *ctlr, > spi->mode |= lookup.mode; > spi->irq = lookup.irq; > spi->bits_per_word = lookup.bits_per_word; > - spi->chip_select = lookup.chip_select; > + spi_set_chipselect(spi, 0, lookup.chip_select); > > return spi; > } > @@ -3632,7 +3631,7 @@ static int spi_set_cs_timing(struct spi_device *spi) > struct device *parent = spi->controller->dev.parent; > int status = 0; > > - if (spi->controller->set_cs_timing && !spi->cs_gpiod) { > + if (spi->controller->set_cs_timing && !spi_get_csgpiod(spi, 0)) { > if (spi->controller->auto_runtime_pm) { > status = pm_runtime_get_sync(parent); > if (status < 0) { > @@ -3837,7 +3836,7 @@ static int __spi_validate(struct spi_device *spi, struct spi_message *message) > * cs_change is set for each transfer. > */ > if ((spi->mode & SPI_CS_WORD) && (!(ctlr->mode_bits & SPI_CS_WORD) || > - spi->cs_gpiod)) { > + spi_get_csgpiod(spi, 0))) { > size_t maxsize; > int ret; > > diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h > index 9a32495fbb1f..9b23a1d0dd0d 100644 > --- a/include/linux/spi/spi.h > +++ b/include/linux/spi/spi.h > @@ -263,6 +263,26 @@ static inline void *spi_get_drvdata(struct spi_device *spi) > return dev_get_drvdata(&spi->dev); > } > > +static inline u8 spi_get_chipselect(struct spi_device *spi, u8 idx) > +{ > + return spi->chip_select; > +} > + > +static inline void spi_set_chipselect(struct spi_device *spi, u8 idx, u8 chipselect) > +{ > + spi->chip_select = chipselect; > +} > + > +static inline struct gpio_desc *spi_get_csgpiod(struct spi_device *spi, u8 idx) > +{ > + return spi->cs_gpiod; > +} > + > +static inline void spi_set_csgpiod(struct spi_device *spi, u8 idx, struct gpio_desc *csgpiod) > +{ > + spi->cs_gpiod = csgpiod; > +} > + > struct spi_message; > > /** Lars suggested this style in v1 version of this patch here. https://lore.kernel.org/all/12fe1b84-1981-bf56-9323-b7f5b698c196@metafoo.de/ That's why let me also add his Suggested-by: Lars-Peter Clausen <lars@metafoo.de> And Reviewed-by: Michal Simek <michal.simek@amd.com> Thanks, Michal
On 1/19/23 19:53, Amit Kumar Mahapatra wrote: > Supporting multi-cs in spi drivers would require the chip_select & cs_gpiod > members of struct spi_device to be an array. But changing the type of these > members to array would break the spi driver functionality. To make the > transition smoother introduced four new APIs to get/set the > spi->chip_select & spi->cs_gpiod and replaced all spi->chip_select and > spi->cs_gpiod references with get or set API calls. > While adding multi-cs support in further patches the chip_select & cs_gpiod > members of the spi_device structure would be converted to arrays & the > "idx" parameter of the APIs would be used as array index i.e., > spi->chip_select[idx] & spi->cs_gpiod[idx] respectively. > > Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> > --- > drivers/spi/spi-altera-core.c | 2 +- > drivers/spi/spi-amd.c | 4 ++-- > drivers/spi/spi-ar934x.c | 2 +- > drivers/spi/spi-armada-3700.c | 4 ++-- > drivers/spi/spi-aspeed-smc.c | 13 +++++++------ > drivers/spi/spi-at91-usart.c | 2 +- > drivers/spi/spi-ath79.c | 4 ++-- > drivers/spi/spi-atmel.c | 26 +++++++++++++------------- > drivers/spi/spi-au1550.c | 4 ++-- > drivers/spi/spi-axi-spi-engine.c | 2 +- > drivers/spi/spi-bcm-qspi.c | 10 +++++----- > drivers/spi/spi-bcm2835.c | 19 ++++++++++--------- > drivers/spi/spi-bcm2835aux.c | 4 ++-- > drivers/spi/spi-bcm63xx-hsspi.c | 22 +++++++++++----------- > drivers/spi/spi-bcm63xx.c | 2 +- > drivers/spi/spi-cadence-quadspi.c | 5 +++-- > drivers/spi/spi-cadence-xspi.c | 4 ++-- > drivers/spi/spi-cadence.c | 4 ++-- > drivers/spi/spi-cavium.c | 8 ++++---- > drivers/spi/spi-coldfire-qspi.c | 8 ++++---- > drivers/spi/spi-davinci.c | 18 +++++++++--------- > drivers/spi/spi-dln2.c | 6 +++--- > drivers/spi/spi-dw-core.c | 2 +- > drivers/spi/spi-dw-mmio.c | 4 ++-- > drivers/spi/spi-falcon.c | 2 +- > drivers/spi/spi-fsi.c | 2 +- > drivers/spi/spi-fsl-dspi.c | 16 ++++++++-------- > drivers/spi/spi-fsl-espi.c | 6 +++--- > drivers/spi/spi-fsl-lpspi.c | 2 +- > drivers/spi/spi-fsl-qspi.c | 6 +++--- > drivers/spi/spi-fsl-spi.c | 2 +- > drivers/spi/spi-geni-qcom.c | 6 +++--- > drivers/spi/spi-gpio.c | 4 ++-- > drivers/spi/spi-gxp.c | 4 ++-- > drivers/spi/spi-hisi-sfc-v3xx.c | 2 +- > drivers/spi/spi-img-spfi.c | 14 +++++++------- > drivers/spi/spi-imx.c | 30 +++++++++++++++--------------- > drivers/spi/spi-ingenic.c | 4 ++-- > drivers/spi/spi-intel.c | 2 +- > drivers/spi/spi-jcore.c | 4 ++-- > drivers/spi/spi-lantiq-ssc.c | 6 +++--- > drivers/spi/spi-mem.c | 4 ++-- > drivers/spi/spi-meson-spicc.c | 2 +- > drivers/spi/spi-microchip-core.c | 6 +++--- > drivers/spi/spi-mpc512x-psc.c | 8 ++++---- > drivers/spi/spi-mpc52xx.c | 2 +- > drivers/spi/spi-mt65xx.c | 6 +++--- > drivers/spi/spi-mt7621.c | 2 +- > drivers/spi/spi-mux.c | 8 ++++---- > drivers/spi/spi-mxic.c | 10 +++++----- > drivers/spi/spi-mxs.c | 2 +- > drivers/spi/spi-npcm-fiu.c | 20 ++++++++++---------- > drivers/spi/spi-nxp-fspi.c | 10 +++++----- > drivers/spi/spi-omap-100k.c | 2 +- > drivers/spi/spi-omap-uwire.c | 8 ++++---- > drivers/spi/spi-omap2-mcspi.c | 24 ++++++++++++------------ > drivers/spi/spi-orion.c | 4 ++-- > drivers/spi/spi-pci1xxxx.c | 4 ++-- > drivers/spi/spi-pic32-sqi.c | 2 +- > drivers/spi/spi-pic32.c | 4 ++-- > drivers/spi/spi-pl022.c | 4 ++-- > drivers/spi/spi-pxa2xx.c | 6 +++--- > drivers/spi/spi-qcom-qspi.c | 2 +- > drivers/spi/spi-rb4xx.c | 2 +- > drivers/spi/spi-rockchip-sfc.c | 2 +- > drivers/spi/spi-rockchip.c | 26 ++++++++++++++------------ > drivers/spi/spi-rspi.c | 10 +++++----- > drivers/spi/spi-s3c64xx.c | 2 +- > drivers/spi/spi-sc18is602.c | 4 ++-- > drivers/spi/spi-sh-msiof.c | 6 +++--- > drivers/spi/spi-sh-sci.c | 2 +- > drivers/spi/spi-sifive.c | 6 +++--- > drivers/spi/spi-sn-f-ospi.c | 2 +- > drivers/spi/spi-st-ssc4.c | 2 +- > drivers/spi/spi-stm32-qspi.c | 12 ++++++------ > drivers/spi/spi-sun4i.c | 2 +- > drivers/spi/spi-sun6i.c | 2 +- > drivers/spi/spi-synquacer.c | 6 +++--- > drivers/spi/spi-tegra114.c | 28 ++++++++++++++-------------- > drivers/spi/spi-tegra20-sflash.c | 2 +- > drivers/spi/spi-tegra20-slink.c | 6 +++--- > drivers/spi/spi-tegra210-quad.c | 8 ++++---- > drivers/spi/spi-ti-qspi.c | 16 ++++++++-------- > drivers/spi/spi-topcliff-pch.c | 4 ++-- > drivers/spi/spi-wpcm-fiu.c | 12 ++++++------ > drivers/spi/spi-xcomm.c | 2 +- > drivers/spi/spi-xilinx.c | 6 +++--- > drivers/spi/spi-xlp.c | 4 ++-- > drivers/spi/spi-zynq-qspi.c | 2 +- > drivers/spi/spi-zynqmp-gqspi.c | 2 +- > drivers/spi/spidev.c | 6 +++--- > include/trace/events/spi.h | 10 +++++----- > 92 files changed, 315 insertions(+), 310 deletions(-) Reviewed-by: Michal Simek <michal.simek@amd.com> Thanks, Michal
On 1/19/23 19:53, Amit Kumar Mahapatra wrote: > Supporting multi-cs in spi drivers would require the chip_select & cs_gpiod > members of struct spi_device to be an array. But changing the type of these > members to array would break the spi driver functionality. To make the > transition smoother introduced four new APIs to get/set the > spi->chip_select & spi->cs_gpiod and replaced all spi->chip_select and > spi->cs_gpiod references with get or set API calls. > While adding multi-cs support in further patches the chip_select & cs_gpiod > members of the spi_device structure would be converted to arrays & the > "idx" parameter of the APIs would be used as array index i.e., > spi->chip_select[idx] & spi->cs_gpiod[idx] respectively. > > Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> > --- > drivers/iio/imu/adis16400.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/iio/imu/adis16400.c b/drivers/iio/imu/adis16400.c > index c02fc35dceb4..3eda32e12a53 100644 > --- a/drivers/iio/imu/adis16400.c > +++ b/drivers/iio/imu/adis16400.c > @@ -466,7 +466,7 @@ static int adis16400_initial_setup(struct iio_dev *indio_dev) > > dev_info(&indio_dev->dev, "%s: prod_id 0x%04x at CS%d (irq %d)\n", > indio_dev->name, prod_id, > - st->adis.spi->chip_select, st->adis.spi->irq); > + spi_get_chipselect(st->adis.spi, 0), st->adis.spi->irq); > } > /* use high spi speed if possible */ > if (st->variant->flags & ADIS16400_HAS_SLOW_MODE) { Reviewed-by: Michal Simek <michal.simek@amd.com> Thanks, Michal
On 1/19/23 19:53, Amit Kumar Mahapatra wrote: > Supporting multi-cs in spi drivers would require the chip_select & cs_gpiod > members of struct spi_device to be an array. But changing the type of these > members to array would break the spi driver functionality. To make the > transition smoother introduced four new APIs to get/set the > spi->chip_select & spi->cs_gpiod and replaced all spi->chip_select and > spi->cs_gpiod references with get or set API calls. > While adding multi-cs support in further patches the chip_select & cs_gpiod > members of the spi_device structure would be converted to arrays & the > "idx" parameter of the APIs would be used as array index i.e., > spi->chip_select[idx] & spi->cs_gpiod[idx] respectively. > > Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> > --- > drivers/staging/fbtft/fbtft-core.c | 2 +- > drivers/staging/greybus/spilib.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/staging/fbtft/fbtft-core.c b/drivers/staging/fbtft/fbtft-core.c > index afaba94d1d1c..3a4abf3bae40 100644 > --- a/drivers/staging/fbtft/fbtft-core.c > +++ b/drivers/staging/fbtft/fbtft-core.c > @@ -840,7 +840,7 @@ int fbtft_register_framebuffer(struct fb_info *fb_info) > sprintf(text1, ", %zu KiB buffer memory", par->txbuf.len >> 10); > if (spi) > sprintf(text2, ", spi%d.%d at %d MHz", spi->master->bus_num, > - spi->chip_select, spi->max_speed_hz / 1000000); > + spi_get_chipselect(spi, 0), spi->max_speed_hz / 1000000); > dev_info(fb_info->dev, > "%s frame buffer, %dx%d, %d KiB video memory%s, fps=%lu%s\n", > fb_info->fix.id, fb_info->var.xres, fb_info->var.yres, > diff --git a/drivers/staging/greybus/spilib.c b/drivers/staging/greybus/spilib.c > index ad0700a0bb81..efb3bec58e15 100644 > --- a/drivers/staging/greybus/spilib.c > +++ b/drivers/staging/greybus/spilib.c > @@ -237,7 +237,7 @@ static struct gb_operation *gb_spi_operation_create(struct gb_spilib *spi, > request = operation->request->payload; > request->count = cpu_to_le16(count); > request->mode = dev->mode; > - request->chip_select = dev->chip_select; > + request->chip_select = spi_get_chipselect(dev, 0); > > gb_xfer = &request->transfers[0]; > tx_data = gb_xfer + count; /* place tx data after last gb_xfer */ Reviewed-by: Michal Simek <michal.simek@amd.com> Thanks, Michal
On 1/19/23 19:53, Amit Kumar Mahapatra wrote: > diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c > index 873ff2cf72c9..b7a9ec550ba1 100644 > --- a/drivers/spi/spi-aspeed-smc.c > +++ b/drivers/spi/spi-aspeed-smc.c > @@ -296,7 +296,7 @@ static const struct aspeed_spi_data ast2400_spi_data; > static int do_aspeed_spi_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) > { > struct aspeed_spi *aspi = spi_controller_get_devdata(mem->spi->master); > - struct aspeed_spi_chip *chip = &aspi->chips[mem->spi->chip_select]; > + struct aspeed_spi_chip *chip = &aspi->chips[spi_get_chipselect(mem->spi, 0)]; > u32 addr_mode, addr_mode_backup; > u32 ctl_val; > int ret = 0; > @@ -377,7 +377,8 @@ static const char *aspeed_spi_get_name(struct spi_mem *mem) > struct aspeed_spi *aspi = spi_controller_get_devdata(mem->spi->master); > struct device *dev = aspi->dev; > > - return devm_kasprintf(dev, GFP_KERNEL, "%s.%d", dev_name(dev), mem->spi->chip_select); > + return devm_kasprintf(dev, GFP_KERNEL, "%s.%d", dev_name(dev), > + spi_get_chipselect(mem->spi, 0)); > } > > struct aspeed_spi_window { > @@ -553,7 +554,7 @@ static int aspeed_spi_do_calibration(struct aspeed_spi_chip *chip); > static int aspeed_spi_dirmap_create(struct spi_mem_dirmap_desc *desc) > { > struct aspeed_spi *aspi = spi_controller_get_devdata(desc->mem->spi->master); > - struct aspeed_spi_chip *chip = &aspi->chips[desc->mem->spi->chip_select]; > + struct aspeed_spi_chip *chip = &aspi->chips[spi_get_chipselect(desc->mem->spi, 0)]; > struct spi_mem_op *op = &desc->info.op_tmpl; > u32 ctl_val; > int ret = 0; > @@ -620,7 +621,7 @@ static ssize_t aspeed_spi_dirmap_read(struct spi_mem_dirmap_desc *desc, > u64 offset, size_t len, void *buf) > { > struct aspeed_spi *aspi = spi_controller_get_devdata(desc->mem->spi->master); > - struct aspeed_spi_chip *chip = &aspi->chips[desc->mem->spi->chip_select]; > + struct aspeed_spi_chip *chip = &aspi->chips[spi_get_chipselect(desc->mem->spi, 0)]; > > /* Switch to USER command mode if mapping window is too small */ > if (chip->ahb_window_size < offset + len) { > @@ -670,7 +671,7 @@ static int aspeed_spi_setup(struct spi_device *spi) > { > struct aspeed_spi *aspi = spi_controller_get_devdata(spi->master); > const struct aspeed_spi_data *data = aspi->data; > - unsigned int cs = spi->chip_select; > + unsigned int cs = spi_get_chipselect(spi, 0); > struct aspeed_spi_chip *chip = &aspi->chips[cs]; > > chip->aspi = aspi; > @@ -697,7 +698,7 @@ static int aspeed_spi_setup(struct spi_device *spi) > static void aspeed_spi_cleanup(struct spi_device *spi) > { > struct aspeed_spi *aspi = spi_controller_get_devdata(spi->master); > - unsigned int cs = spi->chip_select; > + unsigned int cs = spi_get_chipselect(spi, 0); > > aspeed_spi_chip_enable(aspi, cs, false); > For the Aspeed driver, Reviewed-by: Cédric Le Goater <clg@kaod.org> Thanks, C.
Hi Amit, On 20/01/23 00:23, Amit Kumar Mahapatra wrote: > Supporting multi-cs in spi drivers would require the chip_select & cs_gpiod > members of struct spi_device to be an array. But changing the type of these > members to array would break the spi driver functionality. To make the > transition smoother introduced four new APIs to get/set the > spi->chip_select & spi->cs_gpiod and replaced all spi->chip_select and > spi->cs_gpiod references with get or set API calls. > While adding multi-cs support in further patches the chip_select & cs_gpiod > members of the spi_device structure would be converted to arrays & the > "idx" parameter of the APIs would be used as array index i.e., > spi->chip_select[idx] & spi->cs_gpiod[idx] respectively. > > Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> > --- > [...] > drivers/spi/spi-cadence-quadspi.c | 5 +++-- > drivers/spi/spi-cadence-xspi.c | 4 ++-- > drivers/spi/spi-cadence.c | 4 ++-- [...] For SPI Cadence QSPI, Reviewed-by: Dhruva Gole <d-gole@ti.com>
On Fri, Jan 20, 2023 at 12:23:31AM +0530, Amit Kumar Mahapatra wrote: > Supporting multi-cs in spi drivers would require the chip_select & cs_gpiod > members of struct spi_device to be an array. But changing the type of these > members to array would break the spi driver functionality. To make the > transition smoother introduced four new APIs to get/set the > spi->chip_select & spi->cs_gpiod and replaced all spi->chip_select and > spi->cs_gpiod references with get or set API calls. > While adding multi-cs support in further patches the chip_select & cs_gpiod > members of the spi_device structure would be converted to arrays & the > "idx" parameter of the APIs would be used as array index i.e., > spi->chip_select[idx] & spi->cs_gpiod[idx] respectively. > > Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> > --- [nip] > drivers/spi/spi-dw-core.c | 2 +- > drivers/spi/spi-dw-mmio.c | 4 ++-- [nip] > diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c > index 99edddf9958b..4fd1aa800cc3 100644 > --- a/drivers/spi/spi-dw-core.c > +++ b/drivers/spi/spi-dw-core.c > @@ -103,7 +103,7 @@ void dw_spi_set_cs(struct spi_device *spi, bool enable) > * support active-high or active-low CS level. > */ > if (cs_high == enable) > - dw_writel(dws, DW_SPI_SER, BIT(spi->chip_select)); > + dw_writel(dws, DW_SPI_SER, BIT(spi_get_chipselect(spi, 0))); > else > dw_writel(dws, DW_SPI_SER, 0); > } > diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c > index 26c40ea6dd12..d511da766ce8 100644 > --- a/drivers/spi/spi-dw-mmio.c > +++ b/drivers/spi/spi-dw-mmio.c > @@ -65,7 +65,7 @@ static void dw_spi_mscc_set_cs(struct spi_device *spi, bool enable) > struct dw_spi *dws = spi_master_get_devdata(spi->master); > struct dw_spi_mmio *dwsmmio = container_of(dws, struct dw_spi_mmio, dws); > struct dw_spi_mscc *dwsmscc = dwsmmio->priv; > - u32 cs = spi->chip_select; > + u32 cs = spi_get_chipselect(spi, 0); > > if (cs < 4) { > u32 sw_mode = MSCC_SPI_MST_SW_MODE_SW_PIN_CTRL_MODE; > @@ -138,7 +138,7 @@ static void dw_spi_sparx5_set_cs(struct spi_device *spi, bool enable) > struct dw_spi *dws = spi_master_get_devdata(spi->master); > struct dw_spi_mmio *dwsmmio = container_of(dws, struct dw_spi_mmio, dws); > struct dw_spi_mscc *dwsmscc = dwsmmio->priv; > - u8 cs = spi->chip_select; > + u8 cs = spi_get_chipselect(spi, 0); > > if (!enable) { > /* CS override drive enable */ For the DW SSI part: Reviewed-by: Serge Semin <fancer.lancer@gmail.com> -Serge(y) [nip]
Hi Amit On 1/19/23 19:53, Amit Kumar Mahapatra wrote: > Supporting multi-cs in spi drivers would require the chip_select & cs_gpiod > members of struct spi_device to be an array. But changing the type of these > members to array would break the spi driver functionality. To make the > transition smoother introduced four new APIs to get/set the > spi->chip_select & spi->cs_gpiod and replaced all spi->chip_select and > spi->cs_gpiod references with get or set API calls. > While adding multi-cs support in further patches the chip_select & cs_gpiod > members of the spi_device structure would be converted to arrays & the > "idx" parameter of the APIs would be used as array index i.e., > spi->chip_select[idx] & spi->cs_gpiod[idx] respectively. > > Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> > --- [...] > drivers/spi/spi-stm32-qspi.c | 12 ++++++------ [...] > diff --git a/drivers/spi/spi-stm32-qspi.c b/drivers/spi/spi-stm32-qspi.c > index 9131660c1afb..b9e61372dcfb 100644 > --- a/drivers/spi/spi-stm32-qspi.c > +++ b/drivers/spi/spi-stm32-qspi.c > @@ -359,7 +359,7 @@ static int stm32_qspi_get_mode(u8 buswidth) > static int stm32_qspi_send(struct spi_device *spi, const struct spi_mem_op *op) > { > struct stm32_qspi *qspi = spi_controller_get_devdata(spi->master); > - struct stm32_qspi_flash *flash = &qspi->flash[spi->chip_select]; > + struct stm32_qspi_flash *flash = &qspi->flash[spi_get_chipselect(spi, 0)]; > u32 ccr, cr; > int timeout, err = 0, err_poll_status = 0; > > @@ -564,7 +564,7 @@ static int stm32_qspi_transfer_one_message(struct spi_controller *ctrl, > struct spi_mem_op op; > int ret = 0; > > - if (!spi->cs_gpiod) > + if (!spi_get_csgpiod(spi, 0)) > return -EOPNOTSUPP; > > ret = pm_runtime_resume_and_get(qspi->dev); > @@ -573,7 +573,7 @@ static int stm32_qspi_transfer_one_message(struct spi_controller *ctrl, > > mutex_lock(&qspi->lock); > > - gpiod_set_value_cansleep(spi->cs_gpiod, true); > + gpiod_set_value_cansleep(spi_get_csgpiod(spi, 0), true); > > list_for_each_entry(transfer, &msg->transfers, transfer_list) { > u8 dummy_bytes = 0; > @@ -626,7 +626,7 @@ static int stm32_qspi_transfer_one_message(struct spi_controller *ctrl, > } > > end_of_transfer: > - gpiod_set_value_cansleep(spi->cs_gpiod, false); > + gpiod_set_value_cansleep(spi_get_csgpiod(spi, 0), false); > > mutex_unlock(&qspi->lock); > > @@ -669,8 +669,8 @@ static int stm32_qspi_setup(struct spi_device *spi) > > presc = DIV_ROUND_UP(qspi->clk_rate, spi->max_speed_hz) - 1; > > - flash = &qspi->flash[spi->chip_select]; > - flash->cs = spi->chip_select; > + flash = &qspi->flash[spi_get_chipselect(spi, 0)]; > + flash->cs = spi_get_chipselect(spi, 0); > flash->presc = presc; > > mutex_lock(&qspi->lock); Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Thanks Patrice
On 01/19/2023 10:53 AM, 'Amit Kumar Mahapatra' via BCM-KERNEL-FEEDBACK-LIST,PDL wrote: > diff --git a/drivers/spi/spi-bcm63xx-hsspi.c > b/drivers/spi/spi-bcm63xx-hsspi.c > index b871fd810d80..dc179c4677d4 100644 > --- a/drivers/spi/spi-bcm63xx-hsspi.c > +++ b/drivers/spi/spi-bcm63xx-hsspi.c > @@ -130,7 +130,7 @@ static void bcm63xx_hsspi_set_cs(struct bcm63xx_hsspi > *bs, unsigned int cs, > static void bcm63xx_hsspi_set_clk(struct bcm63xx_hsspi *bs, > struct spi_device *spi, int hz) > { > - unsigned int profile = spi->chip_select; > + unsigned int profile = spi_get_chipselect(spi, 0); > u32 reg; > > reg = DIV_ROUND_UP(2048, DIV_ROUND_UP(bs->speed_hz, hz)); > @@ -157,7 +157,7 @@ static void bcm63xx_hsspi_set_clk(struct bcm63xx_hsspi > *bs, > static int bcm63xx_hsspi_do_txrx(struct spi_device *spi, struct > spi_transfer *t) > { > struct bcm63xx_hsspi *bs = spi_master_get_devdata(spi->master); > - unsigned int chip_select = spi->chip_select; > + unsigned int chip_select = spi_get_chipselect(spi, 0); > u16 opcode = 0; > int pending = t->len; > int step_size = HSSPI_BUFFER_LEN; > @@ -165,7 +165,7 @@ static int bcm63xx_hsspi_do_txrx(struct spi_device > *spi, struct spi_transfer *t) > u8 *rx = t->rx_buf; > > bcm63xx_hsspi_set_clk(bs, spi, t->speed_hz); > - bcm63xx_hsspi_set_cs(bs, spi->chip_select, true); > + bcm63xx_hsspi_set_cs(bs, spi_get_chipselect(spi, 0), true); > > if (tx && rx) > opcode = HSSPI_OP_READ_WRITE; > @@ -228,14 +228,14 @@ static int bcm63xx_hsspi_setup(struct spi_device > *spi) > u32 reg; > > reg = __raw_readl(bs->regs + > - HSSPI_PROFILE_SIGNAL_CTRL_REG(spi->chip_select)); > + HSSPI_PROFILE_SIGNAL_CTRL_REG(spi_get_chipselect(spi, 0))); > reg &= ~(SIGNAL_CTRL_LAUNCH_RISING | SIGNAL_CTRL_LATCH_RISING); > if (spi->mode & SPI_CPHA) > reg |= SIGNAL_CTRL_LAUNCH_RISING; > else > reg |= SIGNAL_CTRL_LATCH_RISING; > __raw_writel(reg, bs->regs + > - HSSPI_PROFILE_SIGNAL_CTRL_REG(spi->chip_select)); > + HSSPI_PROFILE_SIGNAL_CTRL_REG(spi_get_chipselect(spi, 0))); > > mutex_lock(&bs->bus_mutex); > reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG); > @@ -243,16 +243,16 @@ static int bcm63xx_hsspi_setup(struct spi_device > *spi) > /* only change actual polarities if there is no transfer */ > if ((reg & GLOBAL_CTRL_CS_POLARITY_MASK) == bs->cs_polarity) { > if (spi->mode & SPI_CS_HIGH) > - reg |= BIT(spi->chip_select); > + reg |= BIT(spi_get_chipselect(spi, 0)); > else > - reg &= ~BIT(spi->chip_select); > + reg &= ~BIT(spi_get_chipselect(spi, 0)); > __raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG); > } > > if (spi->mode & SPI_CS_HIGH) > - bs->cs_polarity |= BIT(spi->chip_select); > + bs->cs_polarity |= BIT(spi_get_chipselect(spi, 0)); > else > - bs->cs_polarity &= ~BIT(spi->chip_select); > + bs->cs_polarity &= ~BIT(spi_get_chipselect(spi, 0)); > > mutex_unlock(&bs->bus_mutex); > > @@ -283,7 +283,7 @@ static int bcm63xx_hsspi_transfer_one(struct > spi_master *master, > * e. At the end restore the polarities again to their default values. > */ > > - dummy_cs = !spi->chip_select; > + dummy_cs = !spi_get_chipselect(spi, 0); > bcm63xx_hsspi_set_cs(bs, dummy_cs, true); > > list_for_each_entry(t, &msg->transfers, transfer_list) { > @@ -296,7 +296,7 @@ static int bcm63xx_hsspi_transfer_one(struct > spi_master *master, > spi_transfer_delay_exec(t); > > if (t->cs_change) > - bcm63xx_hsspi_set_cs(bs, spi->chip_select, false); > + bcm63xx_hsspi_set_cs(bs, spi_get_chipselect(spi, 0), false); > } > > mutex_lock(&bs->bus_mutex); For bcm63xx-hsspi driver, Acked-by: William Zhang <william.zhang@broadcom.com>
On Fri, Jan 20, 2023 at 12:23:31AM +0530, Amit Kumar Mahapatra wrote: > Supporting multi-cs in spi drivers would require the chip_select & cs_gpiod > members of struct spi_device to be an array. But changing the type of these > members to array would break the spi driver functionality. To make the > transition smoother introduced four new APIs to get/set the > spi->chip_select & spi->cs_gpiod and replaced all spi->chip_select and > spi->cs_gpiod references with get or set API calls. > While adding multi-cs support in further patches the chip_select & cs_gpiod > members of the spi_device structure would be converted to arrays & the > "idx" parameter of the APIs would be used as array index i.e., > spi->chip_select[idx] & spi->cs_gpiod[idx] respectively. This doesn't apply against current code, please check and resend.
On Fri, 20 Jan 2023 00:23:29 +0530, Amit Kumar Mahapatra wrote: > This patch is in the continuation to the discussions which happened on > 'commit f89504300e94 ("spi: Stacked/parallel memories bindings")' for > adding dt-binding support for stacked/parallel memories. > > This patch series updated the spi-nor, spi core and the spi drivers > to add stacked and parallel memories support. > > [...] Applied to https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next Thanks! [01/13] spi: Add APIs in spi core to set/get spi->chip_select and spi->cs_gpiod commit: 303feb3cc06ac0665d0ee9c1414941200e60e8a3 [02/13] spi: Replace all spi->chip_select and spi->cs_gpiod references with function call (no commit info) [03/13] net: Replace all spi->chip_select and spi->cs_gpiod references with function call (no commit info) [04/13] iio: imu: Replace all spi->chip_select and spi->cs_gpiod references with function call (no commit info) [05/13] mtd: devices: Replace all spi->chip_select and spi->cs_gpiod references with function call (no commit info) [06/13] staging: Replace all spi->chip_select and spi->cs_gpiod references with function call (no commit info) [07/13] platform/x86: serial-multi-instantiate: Replace all spi->chip_select and spi->cs_gpiod references with function call (no commit info) All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark
This patch is in the continuation to the discussions which happened on 'commit f89504300e94 ("spi: Stacked/parallel memories bindings")' for adding dt-binding support for stacked/parallel memories. This patch series updated the spi-nor, spi core and the spi drivers to add stacked and parallel memories support. --- BRANCH: mtd/next Changes in v2: - Rebased the patches on top of v6.2-rc1 - Created separate patch to add get & set APIs for spi->chip_select & spi->cs_gpiod, and replaced all spi->chip_select and spi->cs_gpiod references with the API calls. - Created separate patch to add get & set APIs for nor->params. --- Amit Kumar Mahapatra (13): spi: Add APIs in spi core to set/get spi->chip_select and spi->cs_gpiod spi: Replace all spi->chip_select and spi->cs_gpiod references with function call net: Replace all spi->chip_select and spi->cs_gpiod references with function call iio: imu: Replace all spi->chip_select and spi->cs_gpiod references with function call mtd: devices: Replace all spi->chip_select and spi->cs_gpiod references with function call staging: Replace all spi->chip_select and spi->cs_gpiod references with function call platform/x86: serial-multi-instantiate: Replace all spi->chip_select and spi->cs_gpiod references with function call spi: Add stacked and parallel memories support in SPI core mtd: spi-nor: Add APIs to set/get nor->params mtd: spi-nor: Add stacked memories support in spi-nor spi: spi-zynqmp-gqspi: Add stacked memories support in GQSPI driver mtd: spi-nor: Add parallel memories support in spi-nor spi: spi-zynqmp-gqspi: Add parallel memories support in GQSPI driver drivers/iio/imu/adis16400.c | 2 +- drivers/mtd/devices/mtd_dataflash.c | 2 +- drivers/mtd/spi-nor/atmel.c | 17 +- drivers/mtd/spi-nor/core.c | 665 +++++++++++++++--- drivers/mtd/spi-nor/core.h | 8 + drivers/mtd/spi-nor/debugfs.c | 4 +- drivers/mtd/spi-nor/gigadevice.c | 4 +- drivers/mtd/spi-nor/issi.c | 11 +- drivers/mtd/spi-nor/macronix.c | 6 +- drivers/mtd/spi-nor/micron-st.c | 39 +- drivers/mtd/spi-nor/otp.c | 25 +- drivers/mtd/spi-nor/sfdp.c | 29 +- drivers/mtd/spi-nor/spansion.c | 50 +- drivers/mtd/spi-nor/sst.c | 7 +- drivers/mtd/spi-nor/swp.c | 22 +- drivers/mtd/spi-nor/winbond.c | 10 +- drivers/mtd/spi-nor/xilinx.c | 18 +- drivers/net/ethernet/adi/adin1110.c | 2 +- drivers/net/ethernet/asix/ax88796c_main.c | 2 +- drivers/net/ethernet/davicom/dm9051.c | 2 +- drivers/net/ethernet/qualcomm/qca_debug.c | 2 +- drivers/net/ieee802154/ca8210.c | 2 +- drivers/net/wan/slic_ds26522.c | 2 +- .../net/wireless/marvell/libertas/if_spi.c | 2 +- drivers/net/wireless/silabs/wfx/bus_spi.c | 2 +- drivers/net/wireless/st/cw1200/cw1200_spi.c | 2 +- .../platform/x86/serial-multi-instantiate.c | 3 +- drivers/spi/spi-altera-core.c | 2 +- drivers/spi/spi-amd.c | 4 +- drivers/spi/spi-ar934x.c | 2 +- drivers/spi/spi-armada-3700.c | 4 +- drivers/spi/spi-aspeed-smc.c | 13 +- drivers/spi/spi-at91-usart.c | 2 +- drivers/spi/spi-ath79.c | 4 +- drivers/spi/spi-atmel.c | 26 +- drivers/spi/spi-au1550.c | 4 +- drivers/spi/spi-axi-spi-engine.c | 2 +- drivers/spi/spi-bcm-qspi.c | 10 +- drivers/spi/spi-bcm2835.c | 19 +- drivers/spi/spi-bcm2835aux.c | 4 +- drivers/spi/spi-bcm63xx-hsspi.c | 22 +- drivers/spi/spi-bcm63xx.c | 2 +- drivers/spi/spi-cadence-quadspi.c | 5 +- drivers/spi/spi-cadence-xspi.c | 4 +- drivers/spi/spi-cadence.c | 4 +- drivers/spi/spi-cavium.c | 8 +- drivers/spi/spi-coldfire-qspi.c | 8 +- drivers/spi/spi-davinci.c | 18 +- drivers/spi/spi-dln2.c | 6 +- drivers/spi/spi-dw-core.c | 2 +- drivers/spi/spi-dw-mmio.c | 4 +- drivers/spi/spi-falcon.c | 2 +- drivers/spi/spi-fsi.c | 2 +- drivers/spi/spi-fsl-dspi.c | 16 +- drivers/spi/spi-fsl-espi.c | 6 +- drivers/spi/spi-fsl-lpspi.c | 2 +- drivers/spi/spi-fsl-qspi.c | 6 +- drivers/spi/spi-fsl-spi.c | 2 +- drivers/spi/spi-geni-qcom.c | 6 +- drivers/spi/spi-gpio.c | 4 +- drivers/spi/spi-gxp.c | 4 +- drivers/spi/spi-hisi-sfc-v3xx.c | 2 +- drivers/spi/spi-img-spfi.c | 14 +- drivers/spi/spi-imx.c | 30 +- drivers/spi/spi-ingenic.c | 4 +- drivers/spi/spi-intel.c | 2 +- drivers/spi/spi-jcore.c | 4 +- drivers/spi/spi-lantiq-ssc.c | 6 +- drivers/spi/spi-mem.c | 4 +- drivers/spi/spi-meson-spicc.c | 2 +- drivers/spi/spi-microchip-core.c | 6 +- drivers/spi/spi-mpc512x-psc.c | 8 +- drivers/spi/spi-mpc52xx.c | 2 +- drivers/spi/spi-mt65xx.c | 6 +- drivers/spi/spi-mt7621.c | 2 +- drivers/spi/spi-mux.c | 8 +- drivers/spi/spi-mxic.c | 10 +- drivers/spi/spi-mxs.c | 2 +- drivers/spi/spi-npcm-fiu.c | 20 +- drivers/spi/spi-nxp-fspi.c | 10 +- drivers/spi/spi-omap-100k.c | 2 +- drivers/spi/spi-omap-uwire.c | 8 +- drivers/spi/spi-omap2-mcspi.c | 24 +- drivers/spi/spi-orion.c | 4 +- drivers/spi/spi-pci1xxxx.c | 4 +- drivers/spi/spi-pic32-sqi.c | 2 +- drivers/spi/spi-pic32.c | 4 +- drivers/spi/spi-pl022.c | 4 +- drivers/spi/spi-pxa2xx.c | 6 +- drivers/spi/spi-qcom-qspi.c | 2 +- drivers/spi/spi-rb4xx.c | 2 +- drivers/spi/spi-rockchip-sfc.c | 2 +- drivers/spi/spi-rockchip.c | 26 +- drivers/spi/spi-rspi.c | 10 +- drivers/spi/spi-s3c64xx.c | 2 +- drivers/spi/spi-sc18is602.c | 4 +- drivers/spi/spi-sh-msiof.c | 6 +- drivers/spi/spi-sh-sci.c | 2 +- drivers/spi/spi-sifive.c | 6 +- drivers/spi/spi-sn-f-ospi.c | 2 +- drivers/spi/spi-st-ssc4.c | 2 +- drivers/spi/spi-stm32-qspi.c | 12 +- drivers/spi/spi-sun4i.c | 2 +- drivers/spi/spi-sun6i.c | 2 +- drivers/spi/spi-synquacer.c | 6 +- drivers/spi/spi-tegra114.c | 28 +- drivers/spi/spi-tegra20-sflash.c | 2 +- drivers/spi/spi-tegra20-slink.c | 6 +- drivers/spi/spi-tegra210-quad.c | 8 +- drivers/spi/spi-ti-qspi.c | 16 +- drivers/spi/spi-topcliff-pch.c | 4 +- drivers/spi/spi-wpcm-fiu.c | 12 +- drivers/spi/spi-xcomm.c | 2 +- drivers/spi/spi-xilinx.c | 6 +- drivers/spi/spi-xlp.c | 4 +- drivers/spi/spi-zynq-qspi.c | 2 +- drivers/spi/spi-zynqmp-gqspi.c | 58 +- drivers/spi/spi.c | 224 ++++-- drivers/spi/spidev.c | 6 +- drivers/staging/fbtft/fbtft-core.c | 2 +- drivers/staging/greybus/spilib.c | 2 +- include/linux/mtd/spi-nor.h | 18 +- include/linux/spi/spi.h | 46 +- include/trace/events/spi.h | 10 +- 124 files changed, 1319 insertions(+), 594 deletions(-)