diff mbox series

[v2] arm64: dts: imx8mm: Fix pad control for UART1_DTE_RX

Message ID 20230115213503.26366-1-pierluigi.p@variscite.com
State Accepted
Commit 47123900f3e4a7f769631d6ec15abf44086276f6
Headers show
Series [v2] arm64: dts: imx8mm: Fix pad control for UART1_DTE_RX | expand

Commit Message

Pierluigi Passaro Jan. 15, 2023, 9:35 p.m. UTC
According section
    8.2.5.313 Select Input Register (IOMUXC_UART1_RXD_SELECT_INPUT)
of 
    i.MX 8M Mini Applications Processor Reference Manual, Rev. 3, 11/2020
the required setting for this specific pin configuration is "1"

Signed-off-by: Pierluigi Passaro <pierluigi.p@variscite.com>
---
 arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Marek Vasut Jan. 23, 2023, 3:58 p.m. UTC | #1
On 1/21/23 01:37, Pierluigi Passaro wrote:
> On Mon, Jan 16, 2023 at 8:26 PM Fabio Estevam <festevam@gmail.com> wrote:
>> On Sun, Jan 15, 2023 at 6:35 PM Pierluigi Passaro
>> <pierluigi.p@variscite.com> wrote:
>>>
>>> According section
>>>      8.2.5.313 Select Input Register (IOMUXC_UART1_RXD_SELECT_INPUT)
>>> of
>>>      i.MX 8M Mini Applications Processor Reference Manual, Rev. 3, 11/2020
>>> the required setting for this specific pin configuration is "1"
>>>
>>> Signed-off-by: Pierluigi Passaro <pierluigi.p@variscite.com>
>>
>> Fixes: c1c9d41319c3 ("dt-bindings: imx: Add pinctrl binding doc for imx8mm")
>>
>> Reviewed-by: Fabio Estevam <festevam@gmail.com>
>>
> Thanks for reviewing.
> Is there any further action required on my side ?

Wait for Shawn to review/pick the patch , that's all.
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
index 83c8f715cd90..b1f11098d248 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
+++ b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
@@ -602,7 +602,7 @@ 
 #define MX8MM_IOMUXC_UART1_RXD_GPIO5_IO22                                   0x234 0x49C 0x000 0x5 0x0
 #define MX8MM_IOMUXC_UART1_RXD_TPSMP_HDATA24                                0x234 0x49C 0x000 0x7 0x0
 #define MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX                                 0x238 0x4A0 0x000 0x0 0x0
-#define MX8MM_IOMUXC_UART1_TXD_UART1_DTE_RX                                 0x238 0x4A0 0x4F4 0x0 0x0
+#define MX8MM_IOMUXC_UART1_TXD_UART1_DTE_RX                                 0x238 0x4A0 0x4F4 0x0 0x1
 #define MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI                                  0x238 0x4A0 0x000 0x1 0x0
 #define MX8MM_IOMUXC_UART1_TXD_GPIO5_IO23                                   0x238 0x4A0 0x000 0x5 0x0
 #define MX8MM_IOMUXC_UART1_TXD_TPSMP_HDATA25                                0x238 0x4A0 0x000 0x7 0x0